Commit 036f05fd authored by Viresh Kumar's avatar Viresh Kumar Committed by Vinod Koul

dmaengine/amba-pl08x: Choose peripheral bus as master bus

When we have DMA transfers between peripheral and memory, then we shouldn't
reduce width of peripheral at all, as that may be a strict requirement. But we
can always reduce width of memory access, with some compromise in performance.
Thus, we must select peripheral as master and not memory.

Also this rearranges code to make it shorter.
Signed-off-by: default avatarViresh Kumar <viresh.kumar@st.com>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent e0719165
......@@ -499,34 +499,24 @@ struct pl08x_lli_build_data {
* byte data), slave is still not aligned, then its width will be reduced to
* BYTE.
* - prefers the destination bus if both available
* - if fixed address on one bus the other will be chosen
* - prefers bus with fixed address (i.e. peripheral)
*/
static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd,
struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl)
{
if (!(cctl & PL080_CONTROL_DST_INCR)) {
*mbus = &bd->srcbus;
*sbus = &bd->dstbus;
} else if (!(cctl & PL080_CONTROL_SRC_INCR)) {
*mbus = &bd->dstbus;
*sbus = &bd->srcbus;
} else if (!(cctl & PL080_CONTROL_SRC_INCR)) {
*mbus = &bd->srcbus;
*sbus = &bd->dstbus;
} else {
if (bd->dstbus.buswidth == 4) {
*mbus = &bd->dstbus;
*sbus = &bd->srcbus;
} else if (bd->srcbus.buswidth == 4) {
*mbus = &bd->srcbus;
*sbus = &bd->dstbus;
} else if (bd->dstbus.buswidth == 2) {
if (bd->dstbus.buswidth >= bd->srcbus.buswidth) {
*mbus = &bd->dstbus;
*sbus = &bd->srcbus;
} else if (bd->srcbus.buswidth == 2) {
} else {
*mbus = &bd->srcbus;
*sbus = &bd->dstbus;
} else {
/* bd->srcbus.buswidth == 1 */
*mbus = &bd->dstbus;
*sbus = &bd->srcbus;
}
}
}
......
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