Commit 0394d404 authored by Abel Vesa's avatar Abel Vesa Committed by Shawn Guo

clk: imx: Replace all the clk based helpers with macros

Replacing with macros all the clk based API helpers we reduce the code
duplication. The end goal is to get rid of all these macros when there
will be no more users of the clk based API, that is, when all the i.MX
clock provider drivers will be switched completely to the clk_hw based
API.

This is another step in moving away from the non clk_hw based API usage
throughout the i.MX clock drivers. The reason for doing that is to
have a clear split between the clock provider and the clock consumer API.
Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent ba7928d9
...@@ -71,12 +71,24 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll; ...@@ -71,12 +71,24 @@ extern struct imx_pll14xx_clk imx_1443x_dram_pll;
#define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \ #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \
to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask)) to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
#define imx_clk_fixed(name, rate) \
to_clk(imx_clk_hw_fixed(name, rate))
#define imx_clk_fixed_factor(name, parent, mult, div) \ #define imx_clk_fixed_factor(name, parent, mult, div) \
to_clk(imx_clk_hw_fixed_factor(name, parent, mult, div)) to_clk(imx_clk_hw_fixed_factor(name, parent, mult, div))
#define imx_clk_divider(name, parent, reg, shift, width) \
to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
#define imx_clk_divider2(name, parent, reg, shift, width) \ #define imx_clk_divider2(name, parent, reg, shift, width) \
to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width)) to_clk(imx_clk_hw_divider2(name, parent, reg, shift, width))
#define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \
to_clk(imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags))
#define imx_clk_gate(name, parent, reg, shift) \
to_clk(imx_clk_hw_gate(name, parent, reg, shift))
#define imx_clk_gate_dis(name, parent, reg, shift) \ #define imx_clk_gate_dis(name, parent, reg, shift) \
to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift)) to_clk(imx_clk_hw_gate_dis(name, parent, reg, shift))
...@@ -206,11 +218,6 @@ static inline struct clk *to_clk(struct clk_hw *hw) ...@@ -206,11 +218,6 @@ static inline struct clk *to_clk(struct clk_hw *hw)
return hw->clk; return hw->clk;
} }
static inline struct clk *imx_clk_fixed(const char *name, int rate)
{
return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
}
static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate) static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)
{ {
return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate); return clk_hw_register_fixed_rate(NULL, name, NULL, 0, rate);
...@@ -232,13 +239,6 @@ static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name, ...@@ -232,13 +239,6 @@ static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name,
CLK_SET_RATE_PARENT, mult, div); CLK_SET_RATE_PARENT, mult, div);
} }
static inline struct clk *imx_clk_divider(const char *name, const char *parent,
void __iomem *reg, u8 shift, u8 width)
{
return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
reg, shift, width, 0, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_divider(const char *name, static inline struct clk_hw *imx_clk_hw_divider(const char *name,
const char *parent, const char *parent,
void __iomem *reg, u8 shift, void __iomem *reg, u8 shift,
...@@ -248,14 +248,6 @@ static inline struct clk_hw *imx_clk_hw_divider(const char *name, ...@@ -248,14 +248,6 @@ static inline struct clk_hw *imx_clk_hw_divider(const char *name,
reg, shift, width, 0, &imx_ccm_lock); reg, shift, width, 0, &imx_ccm_lock);
} }
static inline struct clk *imx_clk_divider_flags(const char *name,
const char *parent, void __iomem *reg, u8 shift, u8 width,
unsigned long flags)
{
return clk_register_divider(NULL, name, parent, flags,
reg, shift, width, 0, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_divider_flags(const char *name, static inline struct clk_hw *imx_clk_hw_divider_flags(const char *name,
const char *parent, const char *parent,
void __iomem *reg, u8 shift, void __iomem *reg, u8 shift,
...@@ -282,13 +274,6 @@ static inline struct clk *imx_clk_divider2_flags(const char *name, ...@@ -282,13 +274,6 @@ static inline struct clk *imx_clk_divider2_flags(const char *name,
reg, shift, width, 0, &imx_ccm_lock); reg, shift, width, 0, &imx_ccm_lock);
} }
static inline struct clk *imx_clk_gate(const char *name, const char *parent,
void __iomem *reg, u8 shift)
{
return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
shift, 0, &imx_ccm_lock);
}
static inline struct clk_hw *imx_clk_hw_gate_flags(const char *name, const char *parent, static inline struct clk_hw *imx_clk_hw_gate_flags(const char *name, const char *parent,
void __iomem *reg, u8 shift, unsigned long flags) void __iomem *reg, u8 shift, unsigned long flags)
{ {
......
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