Commit 03af785e authored by Arınç ÜNAL's avatar Arınç ÜNAL Committed by Linus Walleij

dt-bindings: pinctrl: mediatek: fix pinmux header location

Fix the location of the pinmux header files mentioned on the schemas.
Signed-off-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230317213011.13656-17-arinc.unal@arinc9.comSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent c911ad22
...@@ -90,7 +90,7 @@ patternProperties: ...@@ -90,7 +90,7 @@ patternProperties:
description: description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly. defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
bias-disable: true bias-disable: true
......
...@@ -131,7 +131,7 @@ patternProperties: ...@@ -131,7 +131,7 @@ patternProperties:
description: description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in boot/dts/<soc>-pinfunc.h directly. defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
bias-disable: true bias-disable: true
......
...@@ -88,8 +88,8 @@ patternProperties: ...@@ -88,8 +88,8 @@ patternProperties:
description: description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h defined as macros in dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h
directly. directly, for this SoC.
drive-strength: drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16] enum: [2, 4, 6, 8, 10, 12, 14, 16]
......
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