Commit 04a0d2d9 authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu: use defines for mmBIF_IOV_FUNC_IDENTIFIER fields

Rather than magic numbers.
Reviewed-by: default avatarXiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 57ad33a3
...@@ -455,11 +455,10 @@ static void vi_detect_hw_virtualization(struct amdgpu_device *adev) ...@@ -455,11 +455,10 @@ static void vi_detect_hw_virtualization(struct amdgpu_device *adev)
adev->asic_type == CHIP_FIJI) { adev->asic_type == CHIP_FIJI) {
reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER); reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
/* bit0: 0 means pf and 1 means vf */ /* bit0: 0 means pf and 1 means vf */
/* bit31: 0 means disable IOV and 1 means enable */ if (REG_GET_FIELD(reg, BIF_IOV_FUNC_IDENTIFIER, FUNC_IDENTIFIER))
if (reg & 1)
adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF; adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;
/* bit31: 0 means disable IOV and 1 means enable */
if (reg & 0x80000000) if (REG_GET_FIELD(reg, BIF_IOV_FUNC_IDENTIFIER, IOV_ENABLE))
adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV; adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;
} }
......
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