Commit 050086eb authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Mark Brown

ASoC: tegra30: ahub: Switch to use reset-bulk API

Switch to use reset-bulk API in order to make code cleaner.
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210314154459.15375-6-digetx@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent 48d71395
......@@ -65,7 +65,7 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
{
int ret;
ret = reset_control_assert(ahub->reset);
ret = reset_control_bulk_assert(ahub->nresets, ahub->resets);
if (ret)
return ret;
......@@ -75,7 +75,7 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
usleep_range(10, 100);
ret = reset_control_deassert(ahub->reset);
ret = reset_control_bulk_deassert(ahub->nresets, ahub->resets);
if (ret)
goto disable_clocks;
......@@ -339,41 +339,28 @@ int tegra30_ahub_unset_rx_cif_source(enum tegra30_ahub_rxcif rxcif)
}
EXPORT_SYMBOL_GPL(tegra30_ahub_unset_rx_cif_source);
#define MOD_LIST_MASK_TEGRA30 BIT(0)
#define MOD_LIST_MASK_TEGRA114 BIT(1)
#define MOD_LIST_MASK_TEGRA124 BIT(2)
#define MOD_LIST_MASK_TEGRA30_OR_LATER \
(MOD_LIST_MASK_TEGRA30 | MOD_LIST_MASK_TEGRA114 | \
MOD_LIST_MASK_TEGRA124)
#define MOD_LIST_MASK_TEGRA114_OR_LATER \
(MOD_LIST_MASK_TEGRA114 | MOD_LIST_MASK_TEGRA124)
static const struct {
const char *rst_name;
u32 mod_list_mask;
} configlink_mods[] = {
{ "d_audio", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "apbif", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "i2s0", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "i2s1", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "i2s2", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "i2s3", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "i2s4", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "dam0", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "dam1", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "dam2", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "spdif", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "amx", MOD_LIST_MASK_TEGRA114_OR_LATER },
{ "adx", MOD_LIST_MASK_TEGRA114_OR_LATER },
{ "amx1", MOD_LIST_MASK_TEGRA124 },
{ "adx1", MOD_LIST_MASK_TEGRA124 },
{ "afc0", MOD_LIST_MASK_TEGRA124 },
{ "afc1", MOD_LIST_MASK_TEGRA124 },
{ "afc2", MOD_LIST_MASK_TEGRA124 },
{ "afc3", MOD_LIST_MASK_TEGRA124 },
{ "afc4", MOD_LIST_MASK_TEGRA124 },
{ "afc5", MOD_LIST_MASK_TEGRA124 },
static const struct reset_control_bulk_data tegra30_ahub_resets_data[] = {
{ "d_audio" },
{ "apbif" },
{ "i2s0" },
{ "i2s1" },
{ "i2s2" },
{ "i2s3" },
{ "i2s4" },
{ "dam0" },
{ "dam1" },
{ "dam2" },
{ "spdif" },
{ "amx" }, /* Tegra114+ */
{ "adx" }, /* Tegra114+ */
{ "amx1" }, /* Tegra124 */
{ "adx1" }, /* Tegra124 */
{ "afc0" }, /* Tegra124 */
{ "afc1" }, /* Tegra124 */
{ "afc2" }, /* Tegra124 */
{ "afc3" }, /* Tegra124 */
{ "afc4" }, /* Tegra124 */
{ "afc5" }, /* Tegra124 */
};
#define LAST_REG(name) \
......@@ -502,17 +489,17 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = {
};
static struct tegra30_ahub_soc_data soc_data_tegra30 = {
.mod_list_mask = MOD_LIST_MASK_TEGRA30,
.num_resets = 11,
.set_audio_cif = tegra30_ahub_set_cif,
};
static struct tegra30_ahub_soc_data soc_data_tegra114 = {
.mod_list_mask = MOD_LIST_MASK_TEGRA114,
.num_resets = 13,
.set_audio_cif = tegra30_ahub_set_cif,
};
static struct tegra30_ahub_soc_data soc_data_tegra124 = {
.mod_list_mask = MOD_LIST_MASK_TEGRA124,
.num_resets = 21,
.set_audio_cif = tegra124_ahub_set_cif,
};
......@@ -527,8 +514,6 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
const struct tegra30_ahub_soc_data *soc_data;
struct reset_control *rst;
int i;
struct resource *res0;
void __iomem *regs_apbif, *regs_ahub;
int ret = 0;
......@@ -541,34 +526,16 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
return -EINVAL;
soc_data = match->data;
/*
* The AHUB hosts a register bus: the "configlink". For this to
* operate correctly, all devices on this bus must be out of reset.
*/
for (i = 0; i < ARRAY_SIZE(configlink_mods); i++) {
if (!(configlink_mods[i].mod_list_mask &
soc_data->mod_list_mask))
continue;
rst = reset_control_get_exclusive(&pdev->dev,
configlink_mods[i].rst_name);
if (IS_ERR(rst)) {
dev_err(&pdev->dev, "Can't get reset %s\n",
configlink_mods[i].rst_name);
ret = PTR_ERR(rst);
return ret;
}
/* just check presence of the reset control in DT */
reset_control_put(rst);
}
ahub = devm_kzalloc(&pdev->dev, sizeof(struct tegra30_ahub),
GFP_KERNEL);
if (!ahub)
return -ENOMEM;
dev_set_drvdata(&pdev->dev, ahub);
BUILD_BUG_ON(sizeof(ahub->resets) != sizeof(tegra30_ahub_resets_data));
memcpy(ahub->resets, tegra30_ahub_resets_data, sizeof(ahub->resets));
ahub->nresets = soc_data->num_resets;
ahub->soc_data = soc_data;
ahub->dev = &pdev->dev;
......@@ -579,10 +546,11 @@ static int tegra30_ahub_probe(struct platform_device *pdev)
if (ret)
return ret;
ahub->reset = devm_reset_control_array_get_exclusive(&pdev->dev);
if (IS_ERR(ahub->reset)) {
dev_err(&pdev->dev, "Can't get resets: %pe\n", ahub->reset);
return PTR_ERR(ahub->reset);
ret = devm_reset_control_bulk_get_exclusive(&pdev->dev, ahub->nresets,
ahub->resets);
if (ret) {
dev_err(&pdev->dev, "Can't get resets: %d\n", ret);
return ret;
}
res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
......
......@@ -491,7 +491,7 @@ void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg,
struct tegra30_ahub_cif_conf *conf);
struct tegra30_ahub_soc_data {
u32 mod_list_mask;
unsigned int num_resets;
void (*set_audio_cif)(struct regmap *regmap,
unsigned int reg,
struct tegra30_ahub_cif_conf *conf);
......@@ -511,7 +511,8 @@ struct tegra30_ahub_soc_data {
struct tegra30_ahub {
const struct tegra30_ahub_soc_data *soc_data;
struct device *dev;
struct reset_control *reset;
struct reset_control_bulk_data resets[21];
unsigned int nresets;
struct clk_bulk_data clocks[2];
unsigned int nclocks;
resource_size_t apbif_addr;
......
......@@ -23,6 +23,7 @@
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/reset.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
......
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