Commit 0651dfab authored by Deepak Rawat's avatar Deepak Rawat Committed by Roland Scheidegger

drm/vmwgfx: Sync virtual device headers for new feature

Get the latest device headers for SM5 and other features development.

v2: sync to newer bits (merge later commits)
v3: sync to even newer bits
Co-developed-by: default avatarRoland Scheidegger <sroland@vmware.com>
Signed-off-by: default avatarDeepak Rawat <drawat.floss@gmail.com>
Signed-off-by: default avatarNeha Bhende <bhenden@vmware.com>
Signed-off-by: default avatarCharmaine Lee <charmainel@vmware.com>
Signed-off-by: default avatarRoland Scheidegger <sroland@vmware.com>
Reviewed-by: default avatarThomas Hellström (VMware) <thomas_os@shipmail.org>
parent 878c6ecd
/* SPDX-License-Identifier: GPL-2.0 OR MIT */ /* SPDX-License-Identifier: GPL-2.0 OR MIT */
/********************************************************** /**********************************************************
* Copyright 2007-2015 VMware, Inc. * Copyright 2007-2019 VMware, Inc.
* *
* Permission is hereby granted, free of charge, to any person * Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation * obtaining a copy of this software and associated documentation
...@@ -40,11 +40,25 @@ ...@@ -40,11 +40,25 @@
#include "includeCheck.h" #include "includeCheck.h"
#define SVGA3D_NUM_CLIPPLANES 6 #define SVGA3D_NUM_CLIPPLANES 6
#define SVGA3D_MAX_CONTEXT_IDS 256
#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
/*
* While there are separate bind-points for RenderTargetViews and
* UnorderedAccessViews in a DXContext, there is in fact one shared
* semantic space that the guest-driver can use on any given draw call.
* So there are really only 8 slots that can be spilt up between them, with the
* spliceIndex controlling where the UAV's sit in the collapsed array.
*/
#define SVGA3D_MAX_RENDER_TARGETS 8 #define SVGA3D_MAX_RENDER_TARGETS 8
#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS (SVGA3D_MAX_RENDER_TARGETS) #define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS (SVGA3D_MAX_RENDER_TARGETS)
#define SVGA3D_MAX_UAVIEWS 8 #define SVGA3D_MAX_UAVIEWS 8
#define SVGA3D_MAX_CONTEXT_IDS 256 #define SVGA3D_DX11_1_MAX_UAVIEWS 64
#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
/*
* Maximum canonical size of a surface in host-backed mode (pre-GBObjects).
*/
#define SVGA3D_HB_MAX_SURFACE_SIZE MBYTES_2_BYTES(128)
/* /*
* Maximum ID a shader can be assigned on a given context. * Maximum ID a shader can be assigned on a given context.
...@@ -59,6 +73,8 @@ ...@@ -59,6 +73,8 @@
#define SVGA3D_NUM_TEXTURE_UNITS 32 #define SVGA3D_NUM_TEXTURE_UNITS 32
#define SVGA3D_NUM_LIGHTS 8 #define SVGA3D_NUM_LIGHTS 8
#define SVGA3D_MAX_VIDEOPROCESSOR_SAMPLERS 32
/* /*
* Maximum size in dwords of shader text the SVGA device will allow. * Maximum size in dwords of shader text the SVGA device will allow.
* Currently 8 MB. * Currently 8 MB.
...@@ -67,6 +83,11 @@ ...@@ -67,6 +83,11 @@
#define SVGA3D_MAX_SHADER_MEMORY (SVGA3D_MAX_SHADER_MEMORY_BYTES / \ #define SVGA3D_MAX_SHADER_MEMORY (SVGA3D_MAX_SHADER_MEMORY_BYTES / \
sizeof(uint32)) sizeof(uint32))
/*
* The maximum value of threadGroupCount in each dimension
*/
#define SVGA3D_MAX_SHADER_THREAD_GROUPS 65535
#define SVGA3D_MAX_CLIP_PLANES 6 #define SVGA3D_MAX_CLIP_PLANES 6
/* /*
...@@ -85,7 +106,9 @@ ...@@ -85,7 +106,9 @@
/* /*
* Maximum number of array indexes in a GB surface (with DX enabled). * Maximum number of array indexes in a GB surface (with DX enabled).
*/ */
#define SVGA3D_MAX_SURFACE_ARRAYSIZE 512 #define SVGA3D_SM4_MAX_SURFACE_ARRAYSIZE 512
#define SVGA3D_SM5_MAX_SURFACE_ARRAYSIZE 2048
#define SVGA3D_MAX_SURFACE_ARRAYSIZE SVGA3D_SM5_MAX_SURFACE_ARRAYSIZE
/* /*
* The maximum number of vertex arrays we're guaranteed to support in * The maximum number of vertex arrays we're guaranteed to support in
...@@ -99,4 +122,9 @@ ...@@ -99,4 +122,9 @@
*/ */
#define SVGA3D_MAX_DRAW_PRIMITIVE_RANGES 32 #define SVGA3D_MAX_DRAW_PRIMITIVE_RANGES 32
/*
* The maximum number of samples that can be contained in a surface.
*/
#define SVGA3D_MAX_SAMPLES 8
#endif /* _SVGA3D_LIMITS_H_ */ #endif /* _SVGA3D_LIMITS_H_ */
...@@ -131,6 +131,8 @@ enum svga3d_block_desc { ...@@ -131,6 +131,8 @@ enum svga3d_block_desc {
SVGA3DBLOCKDESC_BC3 = 1 << 26, SVGA3DBLOCKDESC_BC3 = 1 << 26,
SVGA3DBLOCKDESC_BC4 = 1 << 27, SVGA3DBLOCKDESC_BC4 = 1 << 27,
SVGA3DBLOCKDESC_BC5 = 1 << 28, SVGA3DBLOCKDESC_BC5 = 1 << 28,
SVGA3DBLOCKDESC_BC6H = 1 << 29,
SVGA3DBLOCKDESC_BC7 = 1 << 30,
SVGA3DBLOCKDESC_A_UINT = SVGA3DBLOCKDESC_ALPHA | SVGA3DBLOCKDESC_A_UINT = SVGA3DBLOCKDESC_ALPHA |
SVGA3DBLOCKDESC_UINT | SVGA3DBLOCKDESC_UINT |
...@@ -290,6 +292,18 @@ enum svga3d_block_desc { ...@@ -290,6 +292,18 @@ enum svga3d_block_desc {
SVGA3DBLOCKDESC_COMP_UNORM, SVGA3DBLOCKDESC_COMP_UNORM,
SVGA3DBLOCKDESC_BC5_COMP_SNORM = SVGA3DBLOCKDESC_BC5 | SVGA3DBLOCKDESC_BC5_COMP_SNORM = SVGA3DBLOCKDESC_BC5 |
SVGA3DBLOCKDESC_COMP_SNORM, SVGA3DBLOCKDESC_COMP_SNORM,
SVGA3DBLOCKDESC_BC6H_COMP_TYPELESS = SVGA3DBLOCKDESC_BC6H |
SVGA3DBLOCKDESC_COMP_TYPELESS,
SVGA3DBLOCKDESC_BC6H_COMP_UF16 = SVGA3DBLOCKDESC_BC6H |
SVGA3DBLOCKDESC_COMPRESSED,
SVGA3DBLOCKDESC_BC6H_COMP_SF16 = SVGA3DBLOCKDESC_BC6H |
SVGA3DBLOCKDESC_COMPRESSED,
SVGA3DBLOCKDESC_BC7_COMP_TYPELESS = SVGA3DBLOCKDESC_BC7 |
SVGA3DBLOCKDESC_COMP_TYPELESS,
SVGA3DBLOCKDESC_BC7_COMP_UNORM = SVGA3DBLOCKDESC_BC7 |
SVGA3DBLOCKDESC_COMP_UNORM,
SVGA3DBLOCKDESC_BC7_COMP_UNORM_SRGB = SVGA3DBLOCKDESC_BC7_COMP_UNORM |
SVGA3DBLOCKDESC_SRGB,
SVGA3DBLOCKDESC_NV12 = SVGA3DBLOCKDESC_YUV_VIDEO | SVGA3DBLOCKDESC_NV12 = SVGA3DBLOCKDESC_YUV_VIDEO |
SVGA3DBLOCKDESC_PLANAR_YUV | SVGA3DBLOCKDESC_PLANAR_YUV |
...@@ -494,7 +508,7 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = { ...@@ -494,7 +508,7 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = {
{{8}, {8}, {8}, {0}}, {{8}, {8}, {8}, {0}},
{{16}, {8}, {0}, {0}}}, {{16}, {8}, {0}, {0}}},
{SVGA3D_FORMAT_DEAD1, SVGA3DBLOCKDESC_UVL, {SVGA3D_FORMAT_DEAD1, SVGA3DBLOCKDESC_NONE,
{1, 1, 1}, 3, 3, {1, 1, 1}, 3, 3,
{{8}, {8}, {8}, {0}}, {{8}, {8}, {8}, {0}},
{{16}, {8}, {0}, {0}}}, {{16}, {8}, {0}, {0}}},
...@@ -604,7 +618,7 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = { ...@@ -604,7 +618,7 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = {
{{0}, {0}, {48}, {0}}, {{0}, {0}, {48}, {0}},
{{0}, {0}, {0}, {0}}}, {{0}, {0}, {0}, {0}}},
{SVGA3D_AYUV, SVGA3DBLOCKDESC_AYUV, {SVGA3D_FORMAT_DEAD2, SVGA3DBLOCKDESC_NONE,
{1, 1, 1}, 4, 4, {1, 1, 1}, 4, 4,
{{8}, {8}, {8}, {8}}, {{8}, {8}, {8}, {8}},
{{0}, {8}, {16}, {24}}}, {{0}, {8}, {16}, {24}}},
...@@ -1103,6 +1117,46 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = { ...@@ -1103,6 +1117,46 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = {
{4, 4, 1}, 16, 16, {4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}}, {{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}}, {{0}, {0}, {0}, {0}}},
{SVGA3D_B4G4R4A4_UNORM, SVGA3DBLOCKDESC_RGBA_UNORM,
{1, 1, 1}, 2, 2,
{{4}, {4}, {4}, {4}},
{{0}, {4}, {8}, {12}}},
{SVGA3D_BC6H_TYPELESS, SVGA3DBLOCKDESC_BC6H_COMP_TYPELESS,
{4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}},
{SVGA3D_BC6H_UF16, SVGA3DBLOCKDESC_BC6H_COMP_UF16,
{4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}},
{SVGA3D_BC6H_SF16, SVGA3DBLOCKDESC_BC6H_COMP_SF16,
{4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}},
{SVGA3D_BC7_TYPELESS, SVGA3DBLOCKDESC_BC7_COMP_TYPELESS,
{4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}},
{SVGA3D_BC7_UNORM, SVGA3DBLOCKDESC_BC7_COMP_UNORM,
{4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}},
{SVGA3D_BC7_UNORM_SRGB, SVGA3DBLOCKDESC_BC7_COMP_UNORM_SRGB,
{4, 4, 1}, 16, 16,
{{0}, {0}, {128}, {0}},
{{0}, {0}, {0}, {0}}},
{SVGA3D_AYUV, SVGA3DBLOCKDESC_AYUV,
{1, 1, 1}, 4, 4,
{{8}, {8}, {8}, {8}},
{{0}, {8}, {16}, {24}}},
}; };
static inline u32 clamped_umul32(u32 a, u32 b) static inline u32 clamped_umul32(u32 a, u32 b)
......
...@@ -37,6 +37,7 @@ typedef s8 int8; ...@@ -37,6 +37,7 @@ typedef s8 int8;
typedef uint64 PA; typedef uint64 PA;
typedef uint32 PPN; typedef uint32 PPN;
typedef uint32 PPN32;
typedef uint64 PPN64; typedef uint64 PPN64;
typedef bool Bool; typedef bool Bool;
......
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