Commit 08125d3e authored by Ingo Molnar's avatar Ingo Molnar

x86: rename ->ESR_DISABLE to ->disable_esr

the ->ESR_DISABLE shouting variant was used to enable the esr_disable
macro wrappers. Those ugly macros are removed now so we can rename
->ESR_DISABLE to ->disable_esr
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent f6f52baf
......@@ -28,7 +28,7 @@ struct genapic {
const struct cpumask *(*target_cpus)(void);
int ESR_DISABLE;
int disable_esr;
int apic_destination_logical;
unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
......
......@@ -1107,7 +1107,7 @@ static void __cpuinit lapic_setup_esr(void)
return;
}
if (apic->ESR_DISABLE) {
if (apic->disable_esr) {
/*
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
......@@ -1157,7 +1157,7 @@ void __cpuinit setup_local_APIC(void)
#ifdef CONFIG_X86_32
/* Pound the ESR really hard over the head with a big hammer - mbligh */
if (lapic_is_integrated() && apic->ESR_DISABLE) {
if (lapic_is_integrated() && apic->disable_esr) {
apic_write(APIC_ESR, 0);
apic_write(APIC_ESR, 0);
apic_write(APIC_ESR, 0);
......
......@@ -184,7 +184,7 @@ struct genapic apic_flat = {
.irq_dest_mode = (APIC_DEST_LOGICAL != 0),
.target_cpus = flat_target_cpus,
.ESR_DISABLE = 0,
.disable_esr = 0,
.apic_destination_logical = 0,
.check_apicid_used = NULL,
.check_apicid_present = NULL,
......@@ -330,7 +330,7 @@ struct genapic apic_physflat = {
.irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = physflat_target_cpus,
.ESR_DISABLE = 0,
.disable_esr = 0,
.apic_destination_logical = 0,
.check_apicid_used = NULL,
.check_apicid_present = NULL,
......
......@@ -186,7 +186,7 @@ struct genapic apic_x2apic_cluster = {
.irq_dest_mode = (APIC_DEST_LOGICAL != 0),
.target_cpus = x2apic_target_cpus,
.ESR_DISABLE = 0,
.disable_esr = 0,
.apic_destination_logical = 0,
.check_apicid_used = NULL,
.check_apicid_present = NULL,
......
......@@ -182,7 +182,7 @@ struct genapic apic_x2apic_phys = {
.irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = x2apic_target_cpus,
.ESR_DISABLE = 0,
.disable_esr = 0,
.apic_destination_logical = 0,
.check_apicid_used = NULL,
.check_apicid_present = NULL,
......
......@@ -247,7 +247,7 @@ struct genapic apic_x2apic_uv_x = {
.irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = uv_target_cpus,
.ESR_DISABLE = 0,
.disable_esr = 0,
.apic_destination_logical = 0,
.check_apicid_used = NULL,
.check_apicid_present = NULL,
......
......@@ -69,7 +69,7 @@ struct genapic apic_bigsmp = {
.irq_dest_mode = 0,
.target_cpus = bigsmp_target_cpus,
.ESR_DISABLE = 1,
.disable_esr = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
......
......@@ -36,7 +36,7 @@ struct genapic apic_default = {
.irq_dest_mode = 1,
.target_cpus = default_target_cpus,
.ESR_DISABLE = 0,
.disable_esr = 0,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
......
......@@ -112,7 +112,7 @@ struct genapic apic_es7000 = {
.irq_dest_mode = 0,
.target_cpus = es7000_target_cpus,
.ESR_DISABLE = 1,
.disable_esr = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
......
......@@ -56,7 +56,7 @@ struct genapic apic_numaq = {
.irq_dest_mode = 0,
.target_cpus = numaq_target_cpus,
.ESR_DISABLE = 1,
.disable_esr = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
......
......@@ -49,7 +49,7 @@ struct genapic apic_summit = {
.irq_dest_mode = 1,
.target_cpus = summit_target_cpus,
.ESR_DISABLE = 1,
.disable_esr = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
......
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