Commit 0815f957 authored by Yijing Wang's avatar Yijing Wang Committed by Bjorn Helgaas

PCI: designware: Save MSI controller in pci_sys_data

Save MSI controller in pci_sys_data instead of assigning MSI controller
pointer to every PCI bus in .add_bus().

[bhelgaas: use dw_pcie_msi_chip, not dw_pcie_msi_controller]
Signed-off-by: default avatarYijing Wang <wangyijing@huawei.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 7ec725b2
...@@ -498,6 +498,11 @@ int __init dw_pcie_host_init(struct pcie_port *pp) ...@@ -498,6 +498,11 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
val |= PORT_LOGIC_SPEED_CHANGE; val |= PORT_LOGIC_SPEED_CHANGE;
dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val); dw_pcie_wr_own_conf(pp, PCIE_LINK_WIDTH_SPEED_CONTROL, 4, val);
#ifdef CONFIG_PCI_MSI
dw_pcie_msi_chip.dev = pp->dev;
dw_pci.msi_ctrl = &dw_pcie_msi_chip;
#endif
dw_pci.nr_controllers = 1; dw_pci.nr_controllers = 1;
dw_pci.private_data = (void **)&pp; dw_pci.private_data = (void **)&pp;
...@@ -747,21 +752,10 @@ static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) ...@@ -747,21 +752,10 @@ static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
return irq; return irq;
} }
static void dw_pcie_add_bus(struct pci_bus *bus)
{
if (IS_ENABLED(CONFIG_PCI_MSI)) {
struct pcie_port *pp = sys_to_pcie(bus->sysdata);
dw_pcie_msi_chip.dev = pp->dev;
bus->msi = &dw_pcie_msi_chip;
}
}
static struct hw_pci dw_pci = { static struct hw_pci dw_pci = {
.setup = dw_pcie_setup, .setup = dw_pcie_setup,
.scan = dw_pcie_scan_bus, .scan = dw_pcie_scan_bus,
.map_irq = dw_pcie_map_irq, .map_irq = dw_pcie_map_irq,
.add_bus = dw_pcie_add_bus,
}; };
void dw_pcie_setup_rc(struct pcie_port *pp) void dw_pcie_setup_rc(struct pcie_port *pp)
......
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