Commit 087fe256 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

[TG3]: Fix bug in setting a tg3_flag

Found a bug while reviewing the patches the second time.

The TG3_FLAG_TXD_MBOX_HWBUG flag is set after the register access
methods have been determined. This patch fixes it by moving it up before
the various access methods are assigned.
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 15f5a585
......@@ -9408,6 +9408,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
}
}
/* 5700 BX chips need to have their TX producer index mailboxes
* written twice to workaround a bug.
*/
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX)
tp->tg3_flags |= TG3_FLAG_TXD_MBOX_HWBUG;
/* Back to back register writes can cause problems on this chip,
* the workaround is to read back all reg writes except those to
* mailbox regs. See tg3_write_indirect_reg32().
......@@ -9682,14 +9688,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
else
tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
/* 5700 BX chips need to have their TX producer index mailboxes
* written twice to workaround a bug.
*/
if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX)
tp->tg3_flags |= TG3_FLAG_TXD_MBOX_HWBUG;
else
tp->tg3_flags &= ~TG3_FLAG_TXD_MBOX_HWBUG;
/* It seems all chips can get confused if TX buffers
* straddle the 4GB address boundary in some cases.
*/
......
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