staging: rtl8192e: Remove files that are not used

For the most part, these extra files came from the previous version
of the RTL8192E driver.
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>

drivers/staging/rtl8192e/internal.h

-/*
- * Cryptographic API.
- *
- * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- */
-#ifndef _CRYPTO_INTERNAL_H
-#define _CRYPTO_INTERNAL_H
-
-
-#include <linux/version.h>
-#include "rtl_crypto.h"
-#include <linux/mm.h>
-#include <linux/highmem.h>
-#include <linux/init.h>
-
-#include <linux/hardirq.h>
-#include <linux/sched.h>
-#include <asm/kmap_types.h>
-
-extern enum km_type crypto_km_types[];
-
-static inline enum km_type crypto_kmap_type(int out)
-{
-	return crypto_km_types[(in_softirq() ? 2 : 0) + out];
-}
-
-static inline void *crypto_kmap(struct page *page, int out)
-{
-	return kmap_atomic(page, crypto_kmap_type(out));
-}
-
-static inline void crypto_kunmap(void *vaddr, int out)
-{
-	kunmap_atomic(vaddr, crypto_kmap_type(out));
-}
-
-static inline void crypto_yield(struct crypto_tfm *tfm)
-{
-	if (!in_softirq())
-		cond_resched();
-}
-
-static inline void *crypto_tfm_ctx(struct crypto_tfm *tfm)
-{
-	return (void *)&tfm[1];
-}
-
-struct crypto_alg *crypto_alg_lookup(const char *name);
-
-#ifdef CONFIG_KMOD
-void crypto_alg_autoload(const char *name);
-struct crypto_alg *crypto_alg_mod_lookup(const char *name);
-#else
-static inline struct crypto_alg *crypto_alg_mod_lookup(const char *name)
-{
-	return crypto_alg_lookup(name);
-}
-#endif
-
-static inline int crypto_alloc_hmac_block(struct crypto_tfm *tfm)
-{
-	return 0;
-}
-
-static inline void crypto_free_hmac_block(struct crypto_tfm *tfm)
-{ }
-
-#ifdef CONFIG_PROC_FS
-void __init crypto_init_proc(void);
-#else
-static inline void crypto_init_proc(void)
-{ }
-#endif
-
-int crypto_init_digest_flags(struct crypto_tfm *tfm, u32 flags);
-int crypto_init_cipher_flags(struct crypto_tfm *tfm, u32 flags);
-int crypto_init_compress_flags(struct crypto_tfm *tfm, u32 flags);
-
-int crypto_init_digest_ops(struct crypto_tfm *tfm);
-int crypto_init_cipher_ops(struct crypto_tfm *tfm);
-int crypto_init_compress_ops(struct crypto_tfm *tfm);
-
-void crypto_exit_digest_ops(struct crypto_tfm *tfm);
-void crypto_exit_cipher_ops(struct crypto_tfm *tfm);
-void crypto_exit_compress_ops(struct crypto_tfm *tfm);
-
-#endif	/* _CRYPTO_INTERNAL_H */

drivers/staging/rtl8192e/kmap_types.h

-#ifndef __KMAP_TYPES_H
-
-#define __KMAP_TYPES_H
-
-
-enum km_type {
-	KM_BOUNCE_READ,
-	KM_SKB_SUNRPC_DATA,
-	KM_SKB_DATA_SOFTIRQ,
-	KM_USER0,
-	KM_USER1,
-	KM_BH_IRQ,
-	KM_SOFTIRQ0,
-	KM_SOFTIRQ1,
-	KM_TYPE_NR
-};
-
-#define _ASM_KMAP_TYPES_H
-
-#endif

drivers/staging/rtl8192e/r8180_93cx6.c

-/*
-   This files contains card eeprom (93c46 or 93c56) programming routines,
-   memory is addressed by 16 bits words.
-
-   This is part of rtl8180 OpenSource driver.
-   Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it>
-   Released under the terms of GPL (General Public Licence)
-
-   Parts of this driver are based on the GPL part of the
-   official realtek driver.
-
-   Parts of this driver are based on the rtl8180 driver skeleton
-   from Patric Schenke & Andres Salomon.
-
-   Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
-
-   We want to tanks the Authors of those projects and the Ndiswrapper
-   project Authors.
-*/
-
-#include "r8180_93cx6.h"
-
-static void eprom_cs(struct r8192_priv *priv, short bit)
-{
-	if (bit)
-		write_nic_byte(priv, EPROM_CMD,
-			       (1<<EPROM_CS_SHIFT) |
-			       read_nic_byte(priv, EPROM_CMD)); //enable EPROM
-	else
-		write_nic_byte(priv, EPROM_CMD, read_nic_byte(priv, EPROM_CMD)
-			       &~(1<<EPROM_CS_SHIFT)); //disable EPROM
-
-	udelay(EPROM_DELAY);
-}
-
-
-static void eprom_ck_cycle(struct r8192_priv *priv)
-{
-	write_nic_byte(priv, EPROM_CMD,
-		       (1<<EPROM_CK_SHIFT) | read_nic_byte(priv, EPROM_CMD));
-	udelay(EPROM_DELAY);
-	write_nic_byte(priv, EPROM_CMD,
-		       read_nic_byte(priv, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT));
-	udelay(EPROM_DELAY);
-}
-
-
-static void eprom_w(struct r8192_priv *priv, short bit)
-{
-	if (bit)
-		write_nic_byte(priv, EPROM_CMD, (1<<EPROM_W_SHIFT) |
-			       read_nic_byte(priv, EPROM_CMD));
-	else
-		write_nic_byte(priv, EPROM_CMD, read_nic_byte(priv, EPROM_CMD)
-			       &~(1<<EPROM_W_SHIFT));
-
-	udelay(EPROM_DELAY);
-}
-
-
-static short eprom_r(struct r8192_priv *priv)
-{
-	short bit;
-
-	bit = (read_nic_byte(priv, EPROM_CMD) & (1<<EPROM_R_SHIFT));
-	udelay(EPROM_DELAY);
-
-	if (bit)
-		return 1;
-	return 0;
-}
-
-
-static void eprom_send_bits_string(struct r8192_priv *priv, short b[], int len)
-{
-	int i;
-
-	for (i = 0; i < len; i++) {
-		eprom_w(priv, b[i]);
-		eprom_ck_cycle(priv);
-	}
-}
-
-
-u32 eprom_read(struct r8192_priv *priv, u32 addr)
-{
-	short read_cmd[] = {1, 1, 0};
-	short addr_str[8];
-	int i;
-	int addr_len;
-	u32 ret;
-
-	ret = 0;
-        //enable EPROM programming
-	write_nic_byte(priv, EPROM_CMD,
-		       (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
-	udelay(EPROM_DELAY);
-
-	if (priv->epromtype == EPROM_93c56) {
-		addr_str[7] = addr & 1;
-		addr_str[6] = addr & (1<<1);
-		addr_str[5] = addr & (1<<2);
-		addr_str[4] = addr & (1<<3);
-		addr_str[3] = addr & (1<<4);
-		addr_str[2] = addr & (1<<5);
-		addr_str[1] = addr & (1<<6);
-		addr_str[0] = addr & (1<<7);
-		addr_len = 8;
-	} else {
-		addr_str[5] = addr & 1;
-		addr_str[4] = addr & (1<<1);
-		addr_str[3] = addr & (1<<2);
-		addr_str[2] = addr & (1<<3);
-		addr_str[1] = addr & (1<<4);
-		addr_str[0] = addr & (1<<5);
-		addr_len = 6;
-	}
-	eprom_cs(priv, 1);
-	eprom_ck_cycle(priv);
-	eprom_send_bits_string(priv, read_cmd, 3);
-	eprom_send_bits_string(priv, addr_str, addr_len);
-
-	//keep chip pin D to low state while reading.
-	//I'm unsure if it is necessary, but anyway shouldn't hurt
-	eprom_w(priv, 0);
-
-	for (i = 0; i < 16; i++) {
-		//eeprom needs a clk cycle between writing opcode&adr
-		//and reading data. (eeprom outs a dummy 0)
-		eprom_ck_cycle(priv);
-		ret |= (eprom_r(priv)<<(15-i));
-	}
-
-	eprom_cs(priv, 0);
-	eprom_ck_cycle(priv);
-
-	//disable EPROM programming
-	write_nic_byte(priv, EPROM_CMD,
-		       (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
-	return ret;
-}

drivers/staging/rtl8192e/r8180_93cx6.h

-/* r8180_93cx6.h - 93c46 or 93c56 eeprom card programming routines
- *
- * This is part of rtl8187 OpenSource driver
- * Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
- * Released under the terms of GPL (General Public Licence)
- * Parts of this driver are based on the GPL part of the official realtek driver
- *
- * Parts of this driver are based on the rtl8180 driver skeleton from
- * Patric Schenke & Andres Salomon.
- *
- * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
- *
- * We want to thank the authors of the above mentioned projects and to
- * the authors of the Ndiswrapper project.
- */
-
-#include "r8192E.h"
-#include "r8192E_hw.h"
-
-#define EPROM_DELAY 10
-
-#define EPROM_ANAPARAM_ADDRLWORD 0xd
-#define EPROM_ANAPARAM_ADDRHWORD 0xe
-
-#define EPROM_RFCHIPID 0x6
-#define EPROM_TXPW_BASE 0x05
-#define EPROM_RFCHIPID_RTL8225U 5
-#define EPROM_RF_PARAM 0x4
-#define EPROM_CONFIG2 0xc
-
-#define EPROM_VERSION 0x1E
-#define MAC_ADR 0x7
-
-#define CIS 0x18
-
-#define EPROM_TXPW0 0x16
-#define EPROM_TXPW2 0x1b
-#define EPROM_TXPW1 0x3d
-
-/* Reads a 16 bits word. */
-u32 eprom_read(struct r8192_priv *priv, u32 addr);

drivers/staging/rtl8192e/r8190P_hwimg.h

-/******************************************************************************
- * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- * The full GNU General Public License is included in this distribution in the
- * file called LICENSE.
- *
- * Contact Information:
- * wlanfae <wlanfae@realtek.com>
-******************************************************************************/
-#ifndef __INC_HAL8190Pci_FW_IMG_H
-#define __INC_HAL8190Pci_FW_IMG_H
-
-/*Created on  2008/12/ 3,  3:26*/
-
-#include <linux/types.h>
-
-#define BootArrayLengthPci 344
-extern u8 Rtl8190PciFwBootArray[BootArrayLengthPci];
-#define MainArrayLengthPci 55388
-extern u8 Rtl8190PciFwMainArray[MainArrayLengthPci];
-#define DataArrayLengthPci 2960
-extern u8 Rtl8190PciFwDataArray[DataArrayLengthPci];
-#define PHY_REGArrayLengthPci 280
-extern u32 Rtl8190PciPHY_REGArray[PHY_REGArrayLengthPci];
-#define PHY_REG_1T2RArrayLengthPci 280
-extern u32 Rtl8190PciPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPci];
-#define RadioA_ArrayLengthPci 246
-extern u32 Rtl8190PciRadioA_Array[RadioA_ArrayLengthPci] ;
-#define RadioB_ArrayLengthPci 78
-extern u32 Rtl8190PciRadioB_Array[RadioB_ArrayLengthPci] ;
-#define RadioC_ArrayLengthPci 246
-extern u32 Rtl8190PciRadioC_Array[RadioC_ArrayLengthPci] ;
-#define RadioD_ArrayLengthPci 78
-extern u32 Rtl8190PciRadioD_Array[RadioD_ArrayLengthPci] ;
-#define MACPHY_ArrayLengthPci 18
-extern u32 Rtl8190PciMACPHY_Array[MACPHY_ArrayLengthPci] ;
-#define MACPHY_Array_PGLengthPci 21
-extern u32 Rtl8190PciMACPHY_Array_PG[MACPHY_Array_PGLengthPci] ;
-#define AGCTAB_ArrayLengthPci 384
-extern u32 Rtl8190PciAGCTAB_Array[AGCTAB_ArrayLengthPci] ;
-
-#endif

drivers/staging/rtl8192e/r8190_rtl8256.h

-/* r8190_rtl8256.h - rtl8256 radio frontend
- *
- * This is part of the rtl8180-sa2400 driver
- * released under the GPL (See file COPYING for details).
- * Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
- *
- * Many thanks to Realtek Corp. for their great support!
- */
-
-#ifndef RTL8225_H
-#define RTL8225_H
-
-#define RTL819X_TOTAL_RF_PATH 2 /* for 8192E */
-
-void PHY_SetRF8256Bandwidth(struct r8192_priv *priv,
-				   HT_CHANNEL_WIDTH Bandwidth);
-
-RT_STATUS PHY_RF8256_Config(struct r8192_priv *priv);
-
-RT_STATUS phy_RF8256_Config_ParaFile(struct r8192_priv *priv);
-
-void PHY_SetRF8256CCKTxPower(struct r8192_priv *priv, u8 powerlevel);
-void PHY_SetRF8256OFDMTxPower(struct r8192_priv *priv, u8 powerlevel);
-
-bool MgntActSet_RF_State(struct r8192_priv *priv,
-			 RT_RF_POWER_STATE StateToSet,
-			 RT_RF_CHANGE_SOURCE ChangeSource);
-
-#endif /* RTL8225_H */

drivers/staging/rtl8192e/r8192E_dm.h

-/*****************************************************************************
- *	Copyright(c) 2007,  RealTEK Technology Inc. All Right Reserved.
- *
- * Module:		Hal819xUsbDM.h	(RTL8192  Header H File)
- *
- *
- * Note:		For dynamic control definition constant structure.
- *
- *
- * Export:
- *
- * Abbrev:
- *
- * History:
- *	Data		Who		Remark
- *	10/04/2007  MHC    	Create initial version.
- *
- *****************************************************************************/
-
-#ifndef	__R8192UDM_H__
-#define __R8192UDM_H__
-
-#define 		OFDM_Table_Length	19
-#define		CCK_Table_length	12
-
-#define		DM_DIG_THRESH_HIGH					40
-#define		DM_DIG_THRESH_LOW					35
-
-#define		DM_DIG_HIGH_PWR_THRESH_HIGH		75
-#define		DM_DIG_HIGH_PWR_THRESH_LOW		70
-
-#define		BW_AUTO_SWITCH_HIGH_LOW			25
-#define		BW_AUTO_SWITCH_LOW_HIGH			30
-
-#define		DM_check_fsync_time_interval				500
-
-
-#define		DM_DIG_BACKOFF				12
-#define		DM_DIG_MAX					0x36
-#define		DM_DIG_MIN					0x1c
-#define		DM_DIG_MIN_Netcore			0x12
-
-#define		RxPathSelection_SS_TH_low		30
-#define		RxPathSelection_diff_TH			18
-
-#define		RateAdaptiveTH_High			50
-#define		RateAdaptiveTH_Low_20M		30
-#define		RateAdaptiveTH_Low_40M		10
-#define		VeryLowRSSI					15
-#define		CTSToSelfTHVal					35
-
-//defined by vivi, for tx power track
-#define		E_FOR_TX_POWER_TRACK               300
-//Dynamic Tx Power Control Threshold
-#define		TX_POWER_NEAR_FIELD_THRESH_HIGH		68
-#define		TX_POWER_NEAR_FIELD_THRESH_LOW		62
-//added by amy for atheros AP
-#define         TX_POWER_ATHEROAP_THRESH_HIGH           78
-#define 	TX_POWER_ATHEROAP_THRESH_LOW		72
-
-//defined by vivi, for showing on UI. Newer firmware has changed to 0x1e0
-#define 		Current_Tx_Rate_Reg         0x1e0//0x1b8
-#define 		Initial_Tx_Rate_Reg         0x1e1 //0x1b9
-#define 		Tx_Retry_Count_Reg         0x1ac
-#define		RegC38_TH				 20
-
-/* 2007/10/04 MH Define upper and lower threshold of DIG enable or disable. */
-typedef struct _dynamic_initial_gain_threshold_
-{
-	u8		dig_enable_flag;
-	u8		dig_algorithm;
-	u8		dbg_mode;
-	u8		dig_algorithm_switch;
-
-	long		rssi_low_thresh;
-	long		rssi_high_thresh;
-
-	long		rssi_high_power_lowthresh;
-	long		rssi_high_power_highthresh;
-
-	u8		dig_state;
-	u8		dig_highpwr_state;
-	u8		cur_connect_state;
-	u8		pre_connect_state;
-
-	u8		curpd_thstate;
-	u8		prepd_thstate;
-	u8		curcs_ratio_state;
-	u8		precs_ratio_state;
-
-	u32		pre_ig_value;
-	u32		cur_ig_value;
-
-	u8		backoff_val;
-	u8		rx_gain_range_max;
-	u8		rx_gain_range_min;
-	bool		initialgain_lowerbound_state;
-
-	long		rssi_val;
-}dig_t;
-
-typedef enum tag_dynamic_init_gain_state_definition
-{
-	DM_STA_DIG_OFF = 0,
-	DM_STA_DIG_ON,
-	DM_STA_DIG_MAX
-}dm_dig_sta_e;
-
-
-/* 2007/10/08 MH Define RATR state. */
-typedef enum tag_dynamic_ratr_state_definition
-{
-	DM_RATR_STA_HIGH = 0,
-	DM_RATR_STA_MIDDLE = 1,
-	DM_RATR_STA_LOW = 2,
-	DM_RATR_STA_MAX
-}dm_ratr_sta_e;
-
-/* 2007/10/11 MH Define DIG operation type. */
-typedef enum tag_dynamic_init_gain_operation_type_definition
-{
-	DIG_TYPE_THRESH_HIGH	= 0,
-	DIG_TYPE_THRESH_LOW	= 1,
-	DIG_TYPE_THRESH_HIGHPWR_HIGH	= 2,
-	DIG_TYPE_THRESH_HIGHPWR_LOW	= 3,
-	DIG_TYPE_DBG_MODE				= 4,
-	DIG_TYPE_RSSI						= 5,
-	DIG_TYPE_ALGORITHM				= 6,
-	DIG_TYPE_BACKOFF					= 7,
-	DIG_TYPE_PWDB_FACTOR			= 8,
-	DIG_TYPE_RX_GAIN_MIN				= 9,
-	DIG_TYPE_RX_GAIN_MAX				= 10,
-	DIG_TYPE_ENABLE 		= 20,
-	DIG_TYPE_DISABLE 		= 30,
-	DIG_OP_TYPE_MAX
-}dm_dig_op_e;
-
-typedef enum tag_dig_algorithm_definition
-{
-	DIG_ALGO_BY_FALSE_ALARM = 0,
-	DIG_ALGO_BY_RSSI	= 1,
-	DIG_ALGO_MAX
-}dm_dig_alg_e;
-
-typedef enum tag_dig_dbgmode_definition
-{
-	DIG_DBG_OFF = 0,
-	DIG_DBG_ON = 1,
-	DIG_DBG_MAX
-}dm_dig_dbg_e;
-
-typedef enum tag_dig_connect_definition
-{
-	DIG_DISCONNECT = 0,
-	DIG_CONNECT = 1,
-	DIG_CONNECT_MAX
-}dm_dig_connect_e;
-
-typedef enum tag_dig_packetdetection_threshold_definition
-{
-	DIG_PD_AT_LOW_POWER = 0,
-	DIG_PD_AT_NORMAL_POWER = 1,
-	DIG_PD_AT_HIGH_POWER = 2,
-	DIG_PD_MAX
-}dm_dig_pd_th_e;
-
-typedef enum tag_dig_cck_cs_ratio_state_definition
-{
-	DIG_CS_RATIO_LOWER = 0,
-	DIG_CS_RATIO_HIGHER = 1,
-	DIG_CS_MAX
-}dm_dig_cs_ratio_e;
-typedef struct _Dynamic_Rx_Path_Selection_
-{
-	u8		Enable;
-	u8		DbgMode;
-	u8		cck_method;
-	u8		cck_Rx_path;
-
-	u8		SS_TH_low;
-	u8		diff_TH;
-	u8		disabledRF;
-	u8		reserved;
-
-	u8		rf_rssi[4];
-	u8		rf_enable_rssi_th[4];
-	long		cck_pwdb_sta[4];
-}DRxPathSel;
-
-typedef enum tag_CCK_Rx_Path_Method_Definition
-{
-	CCK_Rx_Version_1 = 0,
-	CCK_Rx_Version_2= 1,
-	CCK_Rx_Version_MAX
-}DM_CCK_Rx_Path_Method;
-
-typedef enum tag_DM_DbgMode_Definition
-{
-	DM_DBG_OFF = 0,
-	DM_DBG_ON = 1,
-	DM_DBG_MAX
-}DM_DBG_E;
-
-typedef struct tag_Tx_Config_Cmd_Format
-{
-	u32	Op;										/* Command packet type. */
-	u32	Length;									/* Command packet length. */
-	u32	Value;
-}DCMD_TXCMD_T, *PDCMD_TXCMD_T;
-
-
-extern dig_t dm_digtable;
-extern DRxPathSel DM_RxPathSelTable;
-
-void init_hal_dm(struct r8192_priv *priv);
-void deinit_hal_dm(struct r8192_priv *priv);
-
-void hal_dm_watchdog(struct r8192_priv *priv);
-
-void init_rate_adaptive(struct r8192_priv *priv);
-void dm_txpower_trackingcallback(struct work_struct *work);
-void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
-void dm_initialize_txpower_tracking(struct r8192_priv *priv);
-void dm_cck_txpower_adjust(struct r8192_priv *priv, bool binch14);
-
-
-#endif	/*__R8192UDM_H__ */
-

drivers/staging/rtl8192e/r8192E_wx.h

-/*
-	This is part of rtl8180 OpenSource driver - v 0.3
-	Copyright (C) Andrea Merello 2004  <andreamrl@tiscali.it>
-	Released under the terms of GPL (General Public Licence)
-
-	Parts of this driver are based on the GPL part of the official realtek driver
-	Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
-	Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
-	We want to tanks the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-/* this file (will) contains wireless extension handlers*/
-
-#ifndef R8180_WX_H
-#define R8180_WX_H
-extern struct iw_handler_def r8192_wx_handlers_def;
-#endif