Commit 09e05c3f authored by Matan Barak's avatar Matan Barak Committed by David S. Miller

net/mlx4: Set vlan stripping policy by the right command

Changing the vlan stripping policy of the QP isn't supported by older
firmware versions for the INIT2RTR command. Nevertheless, we've used it.

Fix that by doing this policy change using INIT2RTR only if the firmware
supports it, otherwise, we call UPDATE_QP command to do the task.

Fixes: 7677fc9 ('net/mlx4: Strengthen VLAN tags/priorities enforcement in VST mode')
Signed-off-by: default avatarMatan Barak <matanb@mellanox.com>
Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent b7834758
...@@ -1680,7 +1680,7 @@ static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, ...@@ -1680,7 +1680,7 @@ static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
goto unlock; goto unlock;
update_params.smac_index = new_smac_index; update_params.smac_index = new_smac_index;
if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC, if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
&update_params)) { &update_params)) {
release_mac = new_smac; release_mac = new_smac;
goto unlock; goto unlock;
......
...@@ -390,13 +390,14 @@ int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp, gfp_t gfp) ...@@ -390,13 +390,14 @@ int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp, gfp_t gfp)
EXPORT_SYMBOL_GPL(mlx4_qp_alloc); EXPORT_SYMBOL_GPL(mlx4_qp_alloc);
#define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC #define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC
int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp, int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
enum mlx4_update_qp_attr attr, enum mlx4_update_qp_attr attr,
struct mlx4_update_qp_params *params) struct mlx4_update_qp_params *params)
{ {
struct mlx4_cmd_mailbox *mailbox; struct mlx4_cmd_mailbox *mailbox;
struct mlx4_update_qp_context *cmd; struct mlx4_update_qp_context *cmd;
u64 pri_addr_path_mask = 0; u64 pri_addr_path_mask = 0;
u64 qp_mask = 0;
int err = 0; int err = 0;
mailbox = mlx4_alloc_cmd_mailbox(dev); mailbox = mlx4_alloc_cmd_mailbox(dev);
...@@ -413,9 +414,16 @@ int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp, ...@@ -413,9 +414,16 @@ int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
cmd->qp_context.pri_path.grh_mylmc = params->smac_index; cmd->qp_context.pri_path.grh_mylmc = params->smac_index;
} }
if (attr & MLX4_UPDATE_QP_VSD) {
qp_mask |= 1ULL << MLX4_UPD_QP_MASK_VSD;
if (params->flags & MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE)
cmd->qp_context.param3 |= cpu_to_be32(MLX4_STRIP_VLAN);
}
cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask); cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask);
cmd->qp_mask = cpu_to_be64(qp_mask);
err = mlx4_cmd(dev, mailbox->dma, qp->qpn & 0xffffff, 0, err = mlx4_cmd(dev, mailbox->dma, qpn & 0xffffff, 0,
MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A,
MLX4_CMD_NATIVE); MLX4_CMD_NATIVE);
......
...@@ -702,11 +702,13 @@ static int update_vport_qp_param(struct mlx4_dev *dev, ...@@ -702,11 +702,13 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
struct mlx4_qp_context *qpc = inbox->buf + 8; struct mlx4_qp_context *qpc = inbox->buf + 8;
struct mlx4_vport_oper_state *vp_oper; struct mlx4_vport_oper_state *vp_oper;
struct mlx4_priv *priv; struct mlx4_priv *priv;
u32 qp_type;
int port; int port;
port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1; port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1;
priv = mlx4_priv(dev); priv = mlx4_priv(dev);
vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port]; vp_oper = &priv->mfunc.master.vf_oper[slave].vport[port];
qp_type = (be32_to_cpu(qpc->flags) >> 16) & 0xff;
if (MLX4_VGT != vp_oper->state.default_vlan) { if (MLX4_VGT != vp_oper->state.default_vlan) {
/* the reserved QPs (special, proxy, tunnel) /* the reserved QPs (special, proxy, tunnel)
...@@ -715,8 +717,20 @@ static int update_vport_qp_param(struct mlx4_dev *dev, ...@@ -715,8 +717,20 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
if (mlx4_is_qp_reserved(dev, qpn)) if (mlx4_is_qp_reserved(dev, qpn))
return 0; return 0;
/* force strip vlan by clear vsd */ /* force strip vlan by clear vsd, MLX QP refers to Raw Ethernet */
qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN); if (qp_type == MLX4_QP_ST_UD ||
(qp_type == MLX4_QP_ST_MLX && mlx4_is_eth(dev, port))) {
if (dev->caps.bmme_flags & MLX4_BMME_FLAG_VSD_INIT2RTR) {
*(__be32 *)inbox->buf =
cpu_to_be32(be32_to_cpu(*(__be32 *)inbox->buf) |
MLX4_QP_OPTPAR_VLAN_STRIPPING);
qpc->param3 &= ~cpu_to_be32(MLX4_STRIP_VLAN);
} else {
struct mlx4_update_qp_params params = {.flags = 0};
mlx4_update_qp(dev, qpn, MLX4_UPDATE_QP_VSD, &params);
}
}
if (vp_oper->state.link_state == IFLA_VF_LINK_STATE_DISABLE && if (vp_oper->state.link_state == IFLA_VF_LINK_STATE_DISABLE &&
dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP) { dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_UPDATE_QP) {
......
...@@ -209,6 +209,7 @@ enum { ...@@ -209,6 +209,7 @@ enum {
MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9, MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9,
MLX4_BMME_FLAG_RESERVED_LKEY = 1 << 10, MLX4_BMME_FLAG_RESERVED_LKEY = 1 << 10,
MLX4_BMME_FLAG_FAST_REG_WR = 1 << 11, MLX4_BMME_FLAG_FAST_REG_WR = 1 << 11,
MLX4_BMME_FLAG_VSD_INIT2RTR = 1 << 28,
}; };
enum mlx4_event { enum mlx4_event {
......
...@@ -56,7 +56,8 @@ enum mlx4_qp_optpar { ...@@ -56,7 +56,8 @@ enum mlx4_qp_optpar {
MLX4_QP_OPTPAR_RNR_RETRY = 1 << 13, MLX4_QP_OPTPAR_RNR_RETRY = 1 << 13,
MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 << 14, MLX4_QP_OPTPAR_ACK_TIMEOUT = 1 << 14,
MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16, MLX4_QP_OPTPAR_SCHED_QUEUE = 1 << 16,
MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20 MLX4_QP_OPTPAR_COUNTER_INDEX = 1 << 20,
MLX4_QP_OPTPAR_VLAN_STRIPPING = 1 << 21,
}; };
enum mlx4_qp_state { enum mlx4_qp_state {
...@@ -423,13 +424,20 @@ struct mlx4_wqe_inline_seg { ...@@ -423,13 +424,20 @@ struct mlx4_wqe_inline_seg {
enum mlx4_update_qp_attr { enum mlx4_update_qp_attr {
MLX4_UPDATE_QP_SMAC = 1 << 0, MLX4_UPDATE_QP_SMAC = 1 << 0,
MLX4_UPDATE_QP_VSD = 1 << 2,
MLX4_UPDATE_QP_SUPPORTED_ATTRS = (1 << 2) - 1
};
enum mlx4_update_qp_params_flags {
MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE = 1 << 0,
}; };
struct mlx4_update_qp_params { struct mlx4_update_qp_params {
u8 smac_index; u8 smac_index;
u32 flags;
}; };
int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp, int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
enum mlx4_update_qp_attr attr, enum mlx4_update_qp_attr attr,
struct mlx4_update_qp_params *params); struct mlx4_update_qp_params *params);
int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
......
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