Commit 0a7f99aa authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Heiko Stuebner

clk: rockchip: use separate compatibles for rk3288w-cru

Commit 1627f683 ("clk: rockchip: Handle clock tree for rk3288w variant")
added the check for rk3288w-specific clock-tree changes but in turn would
require a double-compatible due to re-using the main rockchip,rk3288-cru
compatible as entry point.

The binding change actually describes the compatibles as one or the other
so adapt the code accordingly and add a real second entry-point for the
clock controller.
Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Reviewed-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # rock-pi-n8
Link: https://lore.kernel.org/r/20200703154948.260369-1-heiko@sntech.de
parent 00bd4041
...@@ -15,6 +15,11 @@ ...@@ -15,6 +15,11 @@
#define RK3288_GRF_SOC_CON(x) (0x244 + x * 4) #define RK3288_GRF_SOC_CON(x) (0x244 + x * 4)
#define RK3288_GRF_SOC_STATUS1 0x284 #define RK3288_GRF_SOC_STATUS1 0x284
enum rk3288_variant {
RK3288_CRU,
RK3288W_CRU,
};
enum rk3288_plls { enum rk3288_plls {
apll, dpll, cpll, gpll, npll, apll, dpll, cpll, gpll, npll,
}; };
...@@ -922,7 +927,8 @@ static struct syscore_ops rk3288_clk_syscore_ops = { ...@@ -922,7 +927,8 @@ static struct syscore_ops rk3288_clk_syscore_ops = {
.resume = rk3288_clk_resume, .resume = rk3288_clk_resume,
}; };
static void __init rk3288_clk_init(struct device_node *np) static void __init rk3288_common_init(struct device_node *np,
enum rk3288_variant soc)
{ {
struct rockchip_clk_provider *ctx; struct rockchip_clk_provider *ctx;
...@@ -945,7 +951,7 @@ static void __init rk3288_clk_init(struct device_node *np) ...@@ -945,7 +951,7 @@ static void __init rk3288_clk_init(struct device_node *np)
rockchip_clk_register_branches(ctx, rk3288_clk_branches, rockchip_clk_register_branches(ctx, rk3288_clk_branches,
ARRAY_SIZE(rk3288_clk_branches)); ARRAY_SIZE(rk3288_clk_branches));
if (of_device_is_compatible(np, "rockchip,rk3288w-cru")) if (soc == RK3288W_CRU)
rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch, rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
ARRAY_SIZE(rk3288w_hclkvio_branch)); ARRAY_SIZE(rk3288w_hclkvio_branch));
else else
...@@ -970,4 +976,15 @@ static void __init rk3288_clk_init(struct device_node *np) ...@@ -970,4 +976,15 @@ static void __init rk3288_clk_init(struct device_node *np)
rockchip_clk_of_add_provider(np, ctx); rockchip_clk_of_add_provider(np, ctx);
} }
static void __init rk3288_clk_init(struct device_node *np)
{
rk3288_common_init(np, RK3288_CRU);
}
CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init); CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
static void __init rk3288w_clk_init(struct device_node *np)
{
rk3288_common_init(np, RK3288W_CRU);
}
CLK_OF_DECLARE(rk3288w_cru, "rockchip,rk3288w-cru", rk3288w_clk_init);
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