Commit 0ab47f80 authored by Tanmay Jagdale's avatar Tanmay Jagdale Committed by Mathieu Poirier

dt-bindings: coresight: Add burst size for TMC

Add "arm,max-burst-size" optional property for TMC ETR.
If specified, this value indicates the maximum burst size
that can be initiated by TMC on the AXI bus.
Signed-off-by: default avatarTanmay Jagdale <tanmay@marvell.com>
Reviewed-by: default avatarMike Leach <mike.leach@linaro.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210901131049.1365367-2-tanmay@marvell.comSigned-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent 204879e6
...@@ -127,6 +127,11 @@ its hardware characteristcs. ...@@ -127,6 +127,11 @@ its hardware characteristcs.
* arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely * arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely
use the SG mode on this system. use the SG mode on this system.
* arm,max-burst-size: The maximum burst size initiated by TMC on the
AXI master interface. The burst size can be in the range [0..15],
the setting supports one data transfer per burst up to a maximum of
16 data transfers per burst.
* Optional property for CATU : * Optional property for CATU :
* interrupts : Exactly one SPI may be listed for reporting the address * interrupts : Exactly one SPI may be listed for reporting the address
error error
......
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