staging: rtl8192e: Rename TPPoll_CQ, AcmHwCtrl and AcmHw_BeqEn

Rename variable TPPoll_CQ to TP_POLL_CQ and AcmHwCtrl to ACM_HW_CTRL and
AcmHw_BeqEn to ACM_HW_BEQ_EN to avoid CamelCase which is not accepted by
checkpatch.
Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/f6731b36c0f3f22213436ba01abc8f1c685844ad.1675003608.git.philipp.g.hortmann@gmail.comSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

drivers/staging/rtl8192e/rtl8192e/r8192E_cmdpkt.c

@@ -76,7 +76,7 @@ bool rtl92e_send_cmd_pkt(struct net_device *dev, u32 type, const void *data,
 
 	} while (frag_offset < len);
 
-	rtl92e_writeb(dev, TP_POLL, TPPoll_CQ);
+	rtl92e_writeb(dev, TP_POLL, TP_POLL_CQ);
 Failed:
 	return rt_status;
 }

drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c

@@ -216,12 +216,12 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
 		union aci_aifsn *pAciAifsn = (union aci_aifsn *)&
 					      (qos_parameters->aifs[0]);
 		u8 acm = pAciAifsn->f.acm;
-		u8 AcmCtrl = rtl92e_readb(dev, AcmHwCtrl);
+		u8 AcmCtrl = rtl92e_readb(dev, ACM_HW_CTRL);
 
 		if (acm) {
 			switch (eACI) {
 			case AC0_BE:
-				AcmCtrl |= AcmHw_BeqEn;
+				AcmCtrl |= ACM_HW_BEQ_EN;
 				break;
 
 			case AC2_VI:
@@ -235,7 +235,7 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
 		} else {
 			switch (eACI) {
 			case AC0_BE:
-				AcmCtrl &= (~AcmHw_BeqEn);
+				AcmCtrl &= (~ACM_HW_BEQ_EN);
 				break;
 
 			case AC2_VI:
@@ -243,14 +243,14 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
 				break;
 
 			case AC3_VO:
-				AcmCtrl &= (~AcmHw_BeqEn);
+				AcmCtrl &= (~ACM_HW_BEQ_EN);
 				break;
 
 			default:
 				break;
 			}
 		}
-		rtl92e_writeb(dev, AcmHwCtrl, AcmCtrl);
+		rtl92e_writeb(dev, ACM_HW_CTRL, AcmCtrl);
 		break;
 	}
 

drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h

@@ -129,7 +129,7 @@ enum _RTL8192PCI_HW {
 #define	IMR_ROK				BIT0
 	ISR			= 0x0f8,
 	TP_POLL			= 0x0fd,
-#define TPPoll_CQ		BIT5
+#define TP_POLL_CQ		BIT5
 	PSR			= 0x0ff,
 	CPU_GEN			= 0x100,
 #define	CPU_CCK_LOOPBACK	0x00030000
@@ -142,8 +142,8 @@ enum _RTL8192PCI_HW {
 #define	CPU_GEN_PWR_STB_CPU	0x00000004
 #define CPU_GEN_NO_LOOPBACK_MSK	0xFFF8FFFF
 #define CPU_GEN_NO_LOOPBACK_SET	0x00080000
-	AcmHwCtrl		= 0x171,
-#define	AcmHw_BeqEn		BIT1
+	ACM_HW_CTRL		= 0x171,
+#define	ACM_HW_BEQ_EN		BIT1
 #define	AcmHw_ViqEn		BIT2
 #define	AcmHw_VoqEn		BIT3
 	RQPN1			= 0x180,