Commit 0ad28a73 authored by Alex Deucher's avatar Alex Deucher Committed by Tim Gardner

drm/amdgpu/gmc: use proper register for vram type on Fiji

BugLink: http://bugs.launchpad.net/bugs/1573034

commit b634de4f upstream.

The offset changed on Fiji.
Reviewed-by: default avatarHarish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: default avatarTim Gardner <tim.gardner@canonical.com>
parent 6c9807a5
...@@ -866,6 +866,8 @@ static int gmc_v8_0_late_init(void *handle) ...@@ -866,6 +866,8 @@ static int gmc_v8_0_late_init(void *handle)
return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0); return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
} }
#define mmMC_SEQ_MISC0_FIJI 0xA71
static int gmc_v8_0_sw_init(void *handle) static int gmc_v8_0_sw_init(void *handle)
{ {
int r; int r;
...@@ -879,7 +881,12 @@ static int gmc_v8_0_sw_init(void *handle) ...@@ -879,7 +881,12 @@ static int gmc_v8_0_sw_init(void *handle)
if (adev->flags & AMD_IS_APU) { if (adev->flags & AMD_IS_APU) {
adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; adev->mc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
} else { } else {
u32 tmp = RREG32(mmMC_SEQ_MISC0); u32 tmp;
if (adev->asic_type == CHIP_FIJI)
tmp = RREG32(mmMC_SEQ_MISC0_FIJI);
else
tmp = RREG32(mmMC_SEQ_MISC0);
tmp &= MC_SEQ_MISC0__MT__MASK; tmp &= MC_SEQ_MISC0__MT__MASK;
adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp); adev->mc.vram_type = gmc_v8_0_convert_vram_type(tmp);
} }
......
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