Commit 0bd8ac7e authored by Jun Lei's avatar Jun Lei Committed by Alex Deucher

drm/amd/display: fix up HUBBUB hw programming for VM

[why]
Some values were not being converted or bit-shifted properly for
HW registers, causing black screen

[how]
Fix up the values before programming HW
Signed-off-by: default avatarJun Lei <jun.lei@amd.com>
Reviewed-by: default avatarAnthony Koo <Anthony.Koo@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 61f33f6a
...@@ -366,25 +366,24 @@ int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub, ...@@ -366,25 +366,24 @@ int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub,
struct dcn_vmid_page_table_config phys_config; struct dcn_vmid_page_table_config phys_config;
REG_SET(DCN_VM_FB_LOCATION_BASE, 0, REG_SET(DCN_VM_FB_LOCATION_BASE, 0,
FB_BASE, pa_config->system_aperture.fb_base); FB_BASE, pa_config->system_aperture.fb_base >> 24);
REG_SET(DCN_VM_FB_LOCATION_TOP, 0, REG_SET(DCN_VM_FB_LOCATION_TOP, 0,
FB_TOP, pa_config->system_aperture.fb_top); FB_TOP, pa_config->system_aperture.fb_top >> 24);
REG_SET(DCN_VM_FB_OFFSET, 0, REG_SET(DCN_VM_FB_OFFSET, 0,
FB_OFFSET, pa_config->system_aperture.fb_offset); FB_OFFSET, pa_config->system_aperture.fb_offset >> 24);
REG_SET(DCN_VM_AGP_BOT, 0, REG_SET(DCN_VM_AGP_BOT, 0,
AGP_BOT, pa_config->system_aperture.agp_bot); AGP_BOT, pa_config->system_aperture.agp_bot >> 24);
REG_SET(DCN_VM_AGP_TOP, 0, REG_SET(DCN_VM_AGP_TOP, 0,
AGP_TOP, pa_config->system_aperture.agp_top); AGP_TOP, pa_config->system_aperture.agp_top >> 24);
REG_SET(DCN_VM_AGP_BASE, 0, REG_SET(DCN_VM_AGP_BASE, 0,
AGP_BASE, pa_config->system_aperture.agp_base); AGP_BASE, pa_config->system_aperture.agp_base >> 24);
if (pa_config->gart_config.page_table_start_addr != pa_config->gart_config.page_table_end_addr) { if (pa_config->gart_config.page_table_start_addr != pa_config->gart_config.page_table_end_addr) {
phys_config.depth = 1;
phys_config.block_size = 4096;
phys_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr >> 12; phys_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr >> 12;
phys_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr >> 12; phys_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr >> 12;
phys_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr; phys_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr;
phys_config.depth = 0;
phys_config.block_size = 0;
// Init VMID 0 based on PA config // Init VMID 0 based on PA config
dcn20_vmid_setup(&hubbub1->vmid[0], &phys_config); dcn20_vmid_setup(&hubbub1->vmid[0], &phys_config);
} }
......
...@@ -61,8 +61,8 @@ enum dcn_hubbub_page_table_depth { ...@@ -61,8 +61,8 @@ enum dcn_hubbub_page_table_depth {
}; };
enum dcn_hubbub_page_table_block_size { enum dcn_hubbub_page_table_block_size {
DCN_PAGE_TABLE_BLOCK_SIZE_4KB, DCN_PAGE_TABLE_BLOCK_SIZE_4KB = 0,
DCN_PAGE_TABLE_BLOCK_SIZE_64KB DCN_PAGE_TABLE_BLOCK_SIZE_64KB = 4
}; };
struct dcn_hubbub_phys_addr_config { struct dcn_hubbub_phys_addr_config {
......
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