Commit 0c521ccb authored by Sahitya Tummala's avatar Sahitya Tummala Committed by David Brown

mmc: msm_sdcc: Check for only DATA_END interrupt to end a request

The current code checks for both DATA_END and DATA_BLK_END bits in
MCI_STATUS register and ends a request only if both are set at a time.
The hardware doesn't always set DATA_BLK_END when DATA_END is set.
But DATA_END status itself is sufficient condition from hardware that
data transfer is done and hence, check for only DATA_END interrupt in
software to end a request.
Signed-off-by: default avatarSahitya Tummala <stummala@codeaurora.org>
Signed-off-by: default avatarDavid Brown <davidb@codeaurora.org>
parent 71dd9106
...@@ -190,7 +190,7 @@ static void ...@@ -190,7 +190,7 @@ static void
msmsdcc_stop_data(struct msmsdcc_host *host) msmsdcc_stop_data(struct msmsdcc_host *host)
{ {
host->curr.data = NULL; host->curr.data = NULL;
host->curr.got_dataend = host->curr.got_datablkend = 0; host->curr.got_dataend = 0;
} }
uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host) uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
...@@ -277,8 +277,7 @@ msmsdcc_dma_complete_tlet(unsigned long data) ...@@ -277,8 +277,7 @@ msmsdcc_dma_complete_tlet(unsigned long data)
host->dma.sg = NULL; host->dma.sg = NULL;
host->dma.busy = 0; host->dma.busy = 0;
if ((host->curr.got_dataend && host->curr.got_datablkend) if (host->curr.got_dataend || mrq->data->error) {
|| mrq->data->error) {
/* /*
* If we've already gotten our DATAEND / DATABLKEND * If we've already gotten our DATAEND / DATABLKEND
...@@ -506,7 +505,6 @@ msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data, ...@@ -506,7 +505,6 @@ msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
host->curr.xfer_remain = host->curr.xfer_size; host->curr.xfer_remain = host->curr.xfer_size;
host->curr.data_xfered = 0; host->curr.data_xfered = 0;
host->curr.got_dataend = 0; host->curr.got_dataend = 0;
host->curr.got_datablkend = 0;
memset(&host->pio, 0, sizeof(host->pio)); memset(&host->pio, 0, sizeof(host->pio));
...@@ -827,14 +825,10 @@ msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status, ...@@ -827,14 +825,10 @@ msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
if (!host->curr.got_dataend && (status & MCI_DATAEND)) if (!host->curr.got_dataend && (status & MCI_DATAEND))
host->curr.got_dataend = 1; host->curr.got_dataend = 1;
if (!host->curr.got_datablkend && (status & MCI_DATABLOCKEND))
host->curr.got_datablkend = 1;
/* /*
* If DMA is still in progress, we complete via the completion handler * If DMA is still in progress, we complete via the completion handler
*/ */
if (host->curr.got_dataend && host->curr.got_datablkend && if (host->curr.got_dataend && !host->dma.busy) {
!host->dma.busy) {
/* /*
* There appears to be an issue in the controller where * There appears to be an issue in the controller where
* if you request a small block transfer (< fifo size), * if you request a small block transfer (< fifo size),
...@@ -871,8 +865,7 @@ msmsdcc_irq(int irq, void *dev_id) ...@@ -871,8 +865,7 @@ msmsdcc_irq(int irq, void *dev_id)
do { do {
status = msmsdcc_readl(host, MMCISTATUS); status = msmsdcc_readl(host, MMCISTATUS);
status &= (msmsdcc_readl(host, MMCIMASK0) | status &= msmsdcc_readl(host, MMCIMASK0);
MCI_DATABLOCKENDMASK);
msmsdcc_writel(host, status, MMCICLEAR); msmsdcc_writel(host, status, MMCICLEAR);
if (status & MCI_SDIOINTR) if (status & MCI_SDIOINTR)
......
...@@ -190,7 +190,6 @@ struct msmsdcc_curr_req { ...@@ -190,7 +190,6 @@ struct msmsdcc_curr_req {
unsigned int xfer_remain; /* Bytes remaining to send */ unsigned int xfer_remain; /* Bytes remaining to send */
unsigned int data_xfered; /* Bytes acked by BLKEND irq */ unsigned int data_xfered; /* Bytes acked by BLKEND irq */
int got_dataend; int got_dataend;
int got_datablkend;
int user_pages; int user_pages;
}; };
......
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