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Commit 0d1503d8 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 

Pull devicetree fixes from Rob Herring:

 - Two fixes due to DT node name changes on Arm, Ltd. boards

 - Treewide rename of Ingenic CGU headers

 - Update ST email addresses

 - Remove Netlogic DT bindings

 - Dropping few more cases of redundant 'maxItems' in schemas

 - Convert toshiba,tc358767 bridge binding to schema

* tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: watchdog: sunxi: fix error in schema
  bindings: media: venus: Drop redundant maxItems for power-domain-names
  dt-bindings: Remove Netlogic bindings
  clk: versatile: clk-icst: Ensure clock names are unique
  of: Support using 'mask' in making device bus id
  dt-bindings: treewide: Update @st.com email address to @foss.st.com
  dt-bindings: media: Update maintainers for st,stm32-hwspinlock.yaml
  dt-bindings: media: Update maintainers for st,stm32-cec.yaml
  dt-bindings: mfd: timers: Update maintainers for st,stm32-timers
  dt-bindings: timer: Update maintainers for st,stm32-timer
  dt-bindings: i2c: imx: hardware do not restrict clock-frequency to only 100 and 400 kHz
  dt-bindings: display: bridge: Convert toshiba,tc358767.txt to yaml
  dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
parents 622c72b6 913d3a3f
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Documentation/devicetree/bindings/arm/sti.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: ST STi Platforms Device Tree Bindings
maintainers:
- Patrice Chotard <patrice.chotard@st.com>
- Patrice Chotard <patrice.chotard@foss.st.com>
properties:
$nodename:
......
Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml
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......@@ -7,8 +7,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 ML-AHB interconnect bindings
maintainers:
- Fabien Dessenne <fabien.dessenne@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
description: |
These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects
......
Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml
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......@@ -7,8 +7,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 Platforms System Controller bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Christophe Roullier <christophe.roullier@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Christophe Roullier <christophe.roullier@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Platforms Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
properties:
$nodename:
......
Documentation/devicetree/bindings/clock/ingenic,cgu.yaml
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......@@ -104,7 +104,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
cgu: clock-controller@10000000 {
compatible = "ingenic,jz4770-cgu", "simple-mfd";
reg = <0x10000000 0x100>;
......
Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Reset Clock Controller Binding
maintainers:
- Gabriel Fernandez <gabriel.fernandez@st.com>
- Gabriel Fernandez <gabriel.fernandez@foss.st.com>
description: |
The RCC IP is both a reset and a clock controller.
......
Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 CRC bindings
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 CRYP bindings
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 HASH bindings
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare MIPI DSI host controller
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
- Philippe CORNU <philippe.cornu@foss.st.com>
description: |
This document defines device tree properties for the Synopsys DesignWare MIPI
......
Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.txt deleted 100644 → 0
View file @ 622c72b6
Toshiba TC358767 eDP bridge bindings
Required properties:
- compatible: "toshiba,tc358767"
- reg: i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
- clock-names: should be "ref"
- clocks: OF device-tree clock specification for refclk input. The reference
clock rate must be 13 MHz, 19.2 MHz, 26 MHz, or 38.4 MHz.
Optional properties:
- shutdown-gpios: OF device-tree gpio specification for SD pin
(active high shutdown input)
- reset-gpios: OF device-tree gpio specification for RSTX pin
(active low system reset)
- toshiba,hpd-pin: TC358767 GPIO pin number to which HPD is connected to (0 or 1)
- ports: the ports node can contain video interface port nodes to connect
to a DPI/DSI source and to an eDP/DP sink according to [1][2]:
- port@0: DSI input port
- port@1: DPI input port
- port@2: eDP/DP output port
[1]: Documentation/devicetree/bindings/graph.txt
[2]: Documentation/devicetree/bindings/media/video-interfaces.txt
Example:
edp-bridge@68 {
compatible = "toshiba,tc358767";
reg = <0x68>;
shutdown-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
clock-names = "ref";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_in: endpoint {
remote-endpoint = <&dpi_out>;
};
};
port@2 {
reg = <2>;
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml 0 → 100644
View file @ 0d1503d8
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358767.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Toshiba TC358767 eDP bridge bindings
maintainers:
- Andrey Gusakov <andrey.gusakov@cogentembedded.com>
description: The TC358767 is bridge device which converts DSI/DPI to eDP/DP
properties:
compatible:
const: toshiba,tc358767
reg:
enum:
- 0x68
- 0x0f
description: |
i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins
clock-names:
const: "ref"
clocks:
maxItems: 1
description: |
OF device-tree clock specification for refclk input. The reference.
clock rate must be 13 MHz, 19.2 MHz, 26 MHz, or 38.4 MHz.
shutdown-gpios:
maxItems: 1
description: |
OF device-tree gpio specification for SD pin(active high shutdown input)
reset-gpios:
maxItems: 1
description: |
OF device-tree gpio specification for RSTX pin(active low system reset)
toshiba,hpd-pin:
$ref: /schemas/types.yaml#/definitions/uint32
enum:
- 0
- 1
description: TC358767 GPIO pin number to which HPD is connected to (0 or 1)
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: |
DSI input port. The remote endpoint phandle should be a
reference to a valid DSI output endpoint node
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: |
DPI input port. The remote endpoint phandle should be a
reference to a valid DPI output endpoint node
port@2:
$ref: /schemas/graph.yaml#/properties/port
description: |
eDP/DP output port. The remote endpoint phandle should be a
reference to a valid eDP panel input endpoint node. This port is
optional, treated as DP panel if not defined
oneOf:
- required:
- port@0
- required:
- port@1
required:
- compatible
- reg
- clock-names
- clocks
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
/* DPI input and eDP output */
i2c {
#address-cells = <1>;
#size-cells = <0>;
edp-bridge@68 {
compatible = "toshiba,tc358767";
reg = <0x68>;
shutdown-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
clock-names = "ref";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_in_0: endpoint {
remote-endpoint = <&dpi_out>;
};
};
port@2 {
reg = <2>;
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
};
- |
/* DPI input and DP output */
i2c {
#address-cells = <1>;
#size-cells = <0>;
edp-bridge@68 {
compatible = "toshiba,tc358767";
reg = <0x68>;
shutdown-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
clock-names = "ref";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
bridge_in_1: endpoint {
remote-endpoint = <&dpi_out>;
};
};
};
};
};
Documentation/devicetree/bindings/display/ingenic,ipu.yaml
View file @ 0d1503d8
......@@ -45,7 +45,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
ipu@13080000 {
compatible = "ingenic,jz4770-ipu", "ingenic,jz4760-ipu";
reg = <0x13080000 0x800>;
......
Documentation/devicetree/bindings/display/ingenic,lcd.yaml
View file @ 0d1503d8
......@@ -88,7 +88,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
lcd-controller@13050000 {
compatible = "ingenic,jz4740-lcd";
reg = <0x13050000 0x1000>;
......@@ -107,7 +107,7 @@ examples:
};
- |
#include <dt-bindings/clock/jz4725b-cgu.h>
#include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
lcd-controller@13050000 {
compatible = "ingenic,jz4725b-lcd";
reg = <0x13050000 0x1000>;
......
Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
- Philippe CORNU <philippe.cornu@foss.st.com>
description: |
The Orise Tech OTM8009A is a 3.97" 480x800 TFT LCD panel connected using
......
Documentation/devicetree/bindings/display/panel/raydium,rm68200.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel
maintainers:
- Philippe CORNU <philippe.cornu@st.com>
- Philippe CORNU <philippe.cornu@foss.st.com>
description: |
The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD
......
Documentation/devicetree/bindings/display/st,stm32-dsi.yaml
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......@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DSI host controller
maintainers:
- Philippe Cornu <philippe.cornu@st.com>
- Yannick Fertre <yannick.fertre@st.com>
- Philippe Cornu <philippe.cornu@foss.st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
description:
The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
......
Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml
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......@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 lcd-tft display controller
maintainers:
- Philippe Cornu <philippe.cornu@st.com>
- Yannick Fertre <yannick.fertre@st.com>
- Philippe Cornu <philippe.cornu@foss.st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/dma/ingenic,dma.yaml
View file @ 0d1503d8
......@@ -68,7 +68,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
dma: dma-controller@13420000 {
compatible = "ingenic,jz4780-dma";
reg = <0x13420000 0x400>, <0x13421000 0x40>;
......
Documentation/devicetree/bindings/dma/st,stm32-dma.yaml
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......@@ -50,7 +50,7 @@ description: |
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
allOf:
- $ref: "dma-controller.yaml#"
......
Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml
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......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
allOf:
- $ref: "dma-router.yaml#"
......
Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml
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......@@ -50,7 +50,7 @@ description: |
if no HW ack signal is used by the MDMA client
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
allOf:
- $ref: "dma-controller.yaml#"
......
Documentation/devicetree/bindings/gpio/gpio-xlp.txt deleted 100644 → 0
View file @ 622c72b6
Netlogic XLP Family GPIO
========================
This GPIO driver is used for following Netlogic XLP SoCs:
XLP832, XLP316, XLP208, XLP980, XLP532
This GPIO driver is also compatible with GPIO controller found on
Broadcom Vulcan ARM64.
Required properties:
-------------------
- compatible: Should be one of the following:
- "netlogic,xlp832-gpio": For Netlogic XLP832
- "netlogic,xlp316-gpio": For Netlogic XLP316
- "netlogic,xlp208-gpio": For Netlogic XLP208
- "netlogic,xlp980-gpio": For Netlogic XLP980
- "netlogic,xlp532-gpio": For Netlogic XLP532
- "brcm,vulcan-gpio": For Broadcom Vulcan ARM64
- reg: Physical base address and length of the controller's registers.
- #gpio-cells: Should be two. The first cell is the pin number and the second
cell is used to specify optional parameters (currently unused).
- gpio-controller: Marks the device node as a GPIO controller.
- nr-gpios: Number of GPIO pins supported by the controller.
- interrupt-cells: Should be two. The first cell is the GPIO Number. The
second cell is used to specify flags. The following subset of flags is
supported:
- trigger type:
1 = low to high edge triggered.
2 = high to low edge triggered.
4 = active high level-sensitive.
8 = active low level-sensitive.
- interrupts: Interrupt number for this device.
- interrupt-controller: Identifies the node as an interrupt controller.
Example:
gpio: xlp_gpio@34000 {
compatible = "netlogic,xlp316-gpio";
reg = <0 0x34100 0x1000
0 0x35100 0x1000>;
#gpio-cells = <2>;
gpio-controller;
nr-gpios = <57>;
#interrupt-cells = <2>;
interrupt-parent = <&pic>;
interrupts = <39>;
interrupt-controller;
};
Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml
View file @ 0d1503d8
......@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Hardware Spinlock bindings
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabien Dessenne <fabien.dessenne@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
properties:
"#hwlock-cells":
......
Documentation/devicetree/bindings/i2c/i2c-imx.yaml
View file @ 0d1503d8
......@@ -57,7 +57,9 @@ properties:
const: ipg
clock-frequency:
enum: [ 100000, 400000 ]
minimum: 1
default: 100000
maximum: 400000
dmas:
items:
......
Documentation/devicetree/bindings/i2c/i2c-xlp9xx.txt deleted 100644 → 0
View file @ 622c72b6
Device tree configuration for the I2C controller on the XLP9xx/5xx SoC
Required properties:
- compatible : should be "netlogic,xlp980-i2c"
- reg : bus address start and address range size of device
- interrupts : interrupt number
Optional properties:
- clock-frequency : frequency of bus clock in Hz
Defaults to 100 KHz when the property is not specified
Example:
i2c0: i2c@113100 {
compatible = "netlogic,xlp980-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x113100 0x100>;
clock-frequency = <400000>;
interrupts = <30>;
interrupt-parent = <&pic>;
};
Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml
View file @ 0d1503d8
......@@ -60,7 +60,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/dma/jz4780-dma.h>
#include <dt-bindings/interrupt-controller/irq.h>
i2c@10054000 {
......
Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: I2C controller embedded in STMicroelectronics STM32 I2C platform
maintainers:
- Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
- Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
......
Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml
View file @ 0d1503d8
......@@ -74,7 +74,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
#include <dt-bindings/iio/adc/ingenic,adc.h>
adc@10070000 {
......
Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Device-Tree bindings for sigma delta modulator
maintainers:
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
View file @ 0d1503d8
......@@ -19,7 +19,7 @@ description: |
Each STM32 ADC block can have up to 3 ADC instances.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml
View file @ 0d1503d8
......@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DFSDM ADC device driver
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Olivier Moysan <olivier.moysan@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description: |
STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
......
Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml
View file @ 0d1503d8
......@@ -15,7 +15,7 @@ description: |
current.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml
View file @ 0d1503d8
......@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 External Interrupt Controller Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Ludovic Barre <ludovic.barre@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Ludovic Barre <ludovic.barre@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml
View file @ 0d1503d8
......@@ -13,8 +13,8 @@ description:
channels (N) can be read from a dedicated register.
maintainers:
- Fabien Dessenne <fabien.dessenne@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml
View file @ 0d1503d8
......@@ -30,7 +30,6 @@ properties:
power-domain-names:
minItems: 2
maxItems: 3
items:
- const: venus
- const: vcodec0
......
Documentation/devicetree/bindings/media/st,stm32-cec.yaml
View file @ 0d1503d8
......@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 CEC bindings
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Yannick Fertre <yannick.fertre@st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding
maintainers:
- Hugues Fruchet <hugues.fruchet@st.com>
- Hugues Fruchet <hugues.fruchet@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
View file @ 0d1503d8
......@@ -84,7 +84,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/gpio/gpio.h>
nemc: memory-controller@13410000 {
compatible = "ingenic,jz4780-nemc";
......
Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml
View file @ 0d1503d8
......@@ -19,7 +19,7 @@ description: |
Select. The FMC2 performs only one access at a time to an external device.
maintainers:
- Christophe Kerello <christophe.kerello@st.com>
- Christophe Kerello <christophe.kerello@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml
View file @ 0d1503d8
......@@ -17,7 +17,7 @@ description: |
- simple counter from IN1 input signal.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
View file @ 0d1503d8
......@@ -17,8 +17,7 @@ description: |
programmable prescaler.
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/mfd/st,stmfx.yaml
View file @ 0d1503d8
......@@ -12,7 +12,7 @@ description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C
through VDD) and resistive touchscreen controller.
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/mfd/st,stpmic1.yaml
View file @ 0d1503d8
......@@ -9,7 +9,7 @@ title: STMicroelectonics STPMIC1 Power Management IC bindings
description: STMicroelectronics STPMIC1 Power Management IC
maintainers:
- pascal Paillet <p.paillet@st.com>
- pascal Paillet <p.paillet@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml
View file @ 0d1503d8
......@@ -44,7 +44,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
cpus {
#address-cells = <1>;
......
Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml
View file @ 0d1503d8
......@@ -61,7 +61,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/dma/jz4780-dma.h>
mmc0: mmc@13450000 {
compatible = "ingenic,jz4780-mmc";
......
Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
View file @ 0d1503d8
......@@ -55,7 +55,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
memory-controller@13410000 {
compatible = "ingenic,jz4780-nemc";
reg = <0x13410000 0x10000>;
......
Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
maintainers:
- Christophe Kerello <christophe.kerello@st.com>
- Christophe Kerello <christophe.kerello@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/net/ingenic,mac.yaml
View file @ 0d1503d8
......@@ -58,7 +58,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/x1000-cgu.h>
#include <dt-bindings/clock/ingenic,x1000-cgu.h>
mac: ethernet@134b0000 {
compatible = "ingenic,x1000-mac";
......
Documentation/devicetree/bindings/net/snps,dwmac.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare MAC Device Tree Bindings
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Giuseppe Cavallaro <peppe.cavallaro@st.com>
- Jose Abreu <joabreu@synopsys.com>
......
Documentation/devicetree/bindings/net/stm32-dwmac.yaml
View file @ 0d1503d8
......@@ -8,8 +8,8 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STM32 / MCU DWMAC glue layer controller
maintainers:
- Alexandre Torgue <alexandre.torgue@st.com>
- Christophe Roullier <christophe.roullier@st.com>
- Alexandre Torgue <alexandre.torgue@foss.st.com>
- Christophe Roullier <christophe.roullier@foss.st.com>
description:
This file documents platform glue layer for stmmac.
......
Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
View file @ 0d1503d8
......@@ -33,7 +33,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
efuse@134100d0 {
compatible = "ingenic,jz4780-efuse";
......
Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml
View file @ 0d1503d8
......@@ -13,7 +13,7 @@ description: |
internal vref (VREFIN_CAL), unique device ID...
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
allOf:
- $ref: "nvmem.yaml#"
......
Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml
View file @ 0d1503d8
......@@ -46,7 +46,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
otg_phy: usb-phy@3c {
compatible = "ingenic,jz4770-phy";
reg = <0x3c 0x10>;
......
Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml
View file @ 0d1503d8
......@@ -24,7 +24,7 @@ description:
|_ UTMI switch_______| OTG controller
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
View file @ 0d1503d8
......@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32 GPIO and Pin Mux/Config controller
maintainers:
- Alexandre TORGUE <alexandre.torgue@st.com>
- Alexandre TORGUE <alexandre.torgue@foss.st.com>
description: |
STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
......
Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 booster for ADC analog input switches bindings
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
description: |
Some STM32 devices embed a 3.3V booster supplied by Vdda, that can be used
......
Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml
View file @ 0d1503d8
......@@ -12,7 +12,7 @@ description: |
components through the dedicated VREF+ pin.
maintainers:
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
allOf:
- $ref: "regulator.yaml#"
......
Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STM32MP1 PWR voltage regulators
maintainers:
- Pascal Paillet <p.paillet@st.com>
- Pascal Paillet <p.paillet@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml
View file @ 0d1503d8
......@@ -58,7 +58,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
vpu: video-decoder@132a0000 {
compatible = "ingenic,jz4770-vpu-rproc";
......
Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
View file @ 0d1503d8
......@@ -11,8 +11,8 @@ description:
boots firmwares on the ST32MP family chipset.
maintainers:
- Fabien Dessenne <fabien.dessenne@st.com>
- Arnaud Pouliquen <arnaud.pouliquen@st.com>
- Fabien Dessenne <fabien.dessenne@foss.st.com>
- Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/rng/ingenic,trng.yaml
View file @ 0d1503d8
......@@ -32,7 +32,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/x1830-cgu.h>
#include <dt-bindings/clock/ingenic,x1830-cgu.h>
dtrng: trng@10072000 {
compatible = "ingenic,x1830-dtrng";
......
Documentation/devicetree/bindings/rng/st,stm32-rng.yaml
View file @ 0d1503d8
......@@ -11,7 +11,7 @@ description: |
IP and is fully separated from other crypto functions.
maintainers:
- Lionel Debieve <lionel.debieve@st.com>
- Lionel Debieve <lionel.debieve@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml
View file @ 0d1503d8
......@@ -72,7 +72,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
rtc_dev: rtc@10003000 {
compatible = "ingenic,jz4740-rtc";
reg = <0x10003000 0x40>;
......
Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Real Time Clock Bindings
maintainers:
- Gabriel Fernandez <gabriel.fernandez@st.com>
- Gabriel Fernandez <gabriel.fernandez@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/serial/ingenic,uart.yaml
View file @ 0d1503d8
......@@ -71,7 +71,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/dma/jz4780-dma.h>
#include <dt-bindings/gpio/gpio.h>
serial@10032000 {
......
Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
View file @ 0d1503d8
......@@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
maintainers:
- Erwan Le Ray <erwan.leray@st.com>
- Erwan Le Ray <erwan.leray@foss.st.com>
title: STMicroelectronics STM32 USART bindings
......
Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: CS42L51 audio codec DT bindings
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/sound/ingenic,aic.yaml
View file @ 0d1503d8
......@@ -71,7 +71,7 @@ required:
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
aic: audio-controller@10020000 {
compatible = "ingenic,jz4740-i2s";
reg = <0x10020000 0x38>;
......
Documentation/devicetree/bindings/sound/ingenic,codec.yaml
View file @ 0d1503d8
......@@ -48,7 +48,7 @@ required:
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
codec: audio-codec@10020080 {
compatible = "ingenic,jz4740-codec";
reg = <0x10020080 0x8>;
......
Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 SPI/I2S Controller
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description:
The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.
......
Documentation/devicetree/bindings/sound/st,stm32-sai.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Serial Audio Interface (SAI)
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description:
The SAI interface (Serial Audio Interface) offers a wide set of audio
......
Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 S/PDIF receiver (SPDIFRX)
maintainers:
- Olivier Moysan <olivier.moysan@st.com>
- Olivier Moysan <olivier.moysan@foss.st.com>
description: |
The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with
......
Documentation/devicetree/bindings/spi/ingenic,spi.yaml
View file @ 0d1503d8
......@@ -55,7 +55,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
spi@10043000 {
compatible = "ingenic,jz4770-spi", "ingenic,jz4750-spi";
reg = <0x10043000 0x1c>;
......
Documentation/devicetree/bindings/spi/spi-xlp.txt deleted 100644 → 0
View file @ 622c72b6
SPI Master controller for Netlogic XLP MIPS64 SOCs
==================================================
Currently this SPI controller driver is supported for the following
Netlogic XLP SoCs:
XLP832, XLP316, XLP208, XLP980, XLP532
Required properties:
- compatible : Should be "netlogic,xlp832-spi".
- #address-cells : Number of cells required to define a chip select address
on the SPI bus.
- #size-cells : Should be zero.
- reg : Should contain register location and length.
- clocks : Phandle of the spi clock
- interrupts : Interrupt number used by this controller.
SPI slave nodes must be children of the SPI master node and can contain
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt.
Example:
spi: xlp_spi@3a100 {
compatible = "netlogic,xlp832-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0 0x3a100 0x100>;
clocks = <&spi_clk>;
interrupts = <34>;
interrupt-parent = <&pic>;
spi_nor@1 {
compatible = "spansion,s25sl12801";
#address-cells = <1>;
#size-cells = <1>;
reg = <1>; /* Chip Select */
spi-max-frequency = <40000000>;
};
};
Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
View file @ 0d1503d8
......@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings
maintainers:
- Christophe Kerello <christophe.kerello@st.com>
- Patrice Chotard <patrice.chotard@st.com>
- Christophe Kerello <christophe.kerello@foss.st.com>
- Patrice Chotard <patrice.chotard@foss.st.com>
allOf:
- $ref: "spi-controller.yaml#"
......
Documentation/devicetree/bindings/spi/st,stm32-spi.yaml
View file @ 0d1503d8
......@@ -13,8 +13,8 @@ description: |
from 4 to 32-bit data size.
maintainers:
- Erwan Leray <erwan.leray@st.com>
- Fabrice Gasnier <fabrice.gasnier@st.com>
- Erwan Leray <erwan.leray@foss.st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
allOf:
- $ref: "spi-controller.yaml#"
......
Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 digital thermal sensor (DTS) binding
maintainers:
- David Hernandez Sanchez <david.hernandezsanchez@st.com>
- Pascal Paillet <p.paillet@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/timer/ingenic,sysost.yaml
View file @ 0d1503d8
......@@ -46,7 +46,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/x1000-cgu.h>
#include <dt-bindings/clock/ingenic,x1000-cgu.h>
ost: timer@12000000 {
compatible = "ingenic,x1000-ost";
......
Documentation/devicetree/bindings/timer/ingenic,tcu.yaml
View file @ 0d1503d8
......@@ -237,7 +237,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
tcu: timer@10002000 {
compatible = "ingenic,jz4770-tcu", "ingenic,jz4760-tcu", "simple-mfd";
......
Documentation/devicetree/bindings/timer/st,stm32-timer.yaml
View file @ 0d1503d8
......@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers bindings
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabrice Gasnier <fabrice.gasnier@foss.st.com>
- Patrice Chotard <patrice.chotard@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/usb/ingenic,musb.yaml
View file @ 0d1503d8
......@@ -58,7 +58,7 @@ additionalProperties: false
examples:
- |
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
usb_phy: usb-phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
......
Documentation/devicetree/bindings/usb/st,stusb160x.yaml
View file @ 0d1503d8
......@@ -7,7 +7,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: STMicroelectronics STUSB160x Type-C controller bindings
maintainers:
- Amelie Delaunay <amelie.delaunay@st.com>
- Amelie Delaunay <amelie.delaunay@foss.st.com>
properties:
compatible:
......
Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
View file @ 0d1503d8
......@@ -40,14 +40,12 @@ properties:
clocks:
minItems: 1
maxItems: 2
items:
- description: High-frequency oscillator input, divided internally
- description: Low-frequency oscillator input, only found on some variants
clock-names:
minItems: 1
maxItems: 2
items:
- const: hosc
- const: losc
......
Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml
View file @ 0d1503d8
......@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Independent WatchDoG (IWDG) bindings
maintainers:
- Yannick Fertre <yannick.fertre@st.com>
- Christophe Roullier <christophe.roullier@st.com>
- Yannick Fertre <yannick.fertre@foss.st.com>
- Christophe Roullier <christophe.roullier@foss.st.com>
allOf:
- $ref: "watchdog.yaml#"
......
arch/mips/boot/dts/ingenic/jz4725b.dtsi
View file @ 0d1503d8
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/jz4725b-cgu.h>
#include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
/ {
......
arch/mips/boot/dts/ingenic/jz4740.dtsi
View file @ 0d1503d8
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
/ {
......
arch/mips/boot/dts/ingenic/jz4770.dtsi
View file @ 0d1503d8
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
/ {
......
arch/mips/boot/dts/ingenic/jz4780.dtsi
View file @ 0d1503d8
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,tcu.h>
#include <dt-bindings/dma/jz4780-dma.h>
......
arch/mips/boot/dts/ingenic/x1000.dtsi
View file @ 0d1503d8
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/ingenic,tcu.h>
#include <dt-bindings/clock/x1000-cgu.h>
#include <dt-bindings/clock/ingenic,x1000-cgu.h>
#include <dt-bindings/dma/x1000-dma.h>
/ {
......
arch/mips/boot/dts/ingenic/x1830.dtsi
View file @ 0d1503d8
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/ingenic,tcu.h>
#include <dt-bindings/clock/x1830-cgu.h>
#include <dt-bindings/clock/ingenic,x1830-cgu.h>
#include <dt-bindings/dma/x1830-dma.h>
/ {
......
drivers/clk/ingenic/jz4725b-cgu.c
View file @ 0d1503d8
......@@ -10,7 +10,7 @@
#include <linux/delay.h>
#include <linux/of.h>
#include <dt-bindings/clock/jz4725b-cgu.h>
#include <dt-bindings/clock/ingenic,jz4725b-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/ingenic/jz4740-cgu.c
View file @ 0d1503d8
......@@ -11,7 +11,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <dt-bindings/clock/jz4740-cgu.h>
#include <dt-bindings/clock/ingenic,jz4740-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/ingenic/jz4760-cgu.c
View file @ 0d1503d8
......@@ -12,7 +12,7 @@
#include <linux/clk.h>
#include <dt-bindings/clock/jz4760-cgu.h>
#include <dt-bindings/clock/ingenic,jz4760-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/ingenic/jz4770-cgu.c
View file @ 0d1503d8
......@@ -10,7 +10,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <dt-bindings/clock/jz4770-cgu.h>
#include <dt-bindings/clock/ingenic,jz4770-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/ingenic/jz4780-cgu.c
View file @ 0d1503d8
......@@ -13,7 +13,7 @@
#include <linux/iopoll.h>
#include <linux/of.h>
#include <dt-bindings/clock/jz4780-cgu.h>
#include <dt-bindings/clock/ingenic,jz4780-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/ingenic/x1000-cgu.c
View file @ 0d1503d8
......@@ -9,7 +9,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <dt-bindings/clock/x1000-cgu.h>
#include <dt-bindings/clock/ingenic,x1000-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/ingenic/x1830-cgu.c
View file @ 0d1503d8
......@@ -9,7 +9,7 @@
#include <linux/io.h>
#include <linux/of.h>
#include <dt-bindings/clock/x1830-cgu.h>
#include <dt-bindings/clock/ingenic,x1830-cgu.h>
#include "cgu.h"
#include "pm.h"
......
drivers/clk/versatile/clk-icst.c
View file @ 0d1503d8
......@@ -484,7 +484,7 @@ static void __init of_syscon_icst_setup(struct device_node *np)
struct device_node *parent;
struct regmap *map;
struct clk_icst_desc icst_desc;
const char *name = np->name;
const char *name;
const char *parent_name;
struct clk *regclk;
enum icst_control_type ctype;
......@@ -533,15 +533,17 @@ static void __init of_syscon_icst_setup(struct device_node *np)
icst_desc.params = &icst525_apcp_cm_params;
ctype = ICST_INTEGRATOR_CP_CM_MEM;
} else {
pr_err("unknown ICST clock %s\n", name);
pr_err("unknown ICST clock %pOF\n", np);
return;
}
/* Parent clock name is not the same as node parent */
parent_name = of_clk_get_parent_name(np, 0);
name = kasprintf(GFP_KERNEL, "%pOFP", np);
regclk = icst_clk_setup(NULL, &icst_desc, name, parent_name, map, ctype);
if (IS_ERR(regclk)) {
kfree(name);
pr_err("error setting up syscon ICST clock %s\n", name);
return;
}
......
drivers/of/platform.c
View file @ 0d1503d8
......@@ -76,6 +76,7 @@ static void of_device_make_bus_id(struct device *dev)
struct device_node *node = dev->of_node;
const __be32 *reg;
u64 addr;
u32 mask;
/* Construct the name, using parent nodes if necessary to ensure uniqueness */
while (node->parent) {
......@@ -85,8 +86,13 @@ static void of_device_make_bus_id(struct device *dev)
*/
reg = of_get_property(node, "reg", NULL);
if (reg && (addr = of_translate_address(node, reg)) != OF_BAD_ADDR) {
dev_set_name(dev, dev_name(dev) ? "%llx.%pOFn:%s" : "%llx.%pOFn",
addr, node, dev_name(dev));
if (!of_property_read_u32(node, "mask", &mask))
dev_set_name(dev, dev_name(dev) ? "%llx.%x.%pOFn:%s" : "%llx.%x.%pOFn",
addr, ffs(mask) - 1, node, dev_name(dev));
else
dev_set_name(dev, dev_name(dev) ? "%llx.%pOFn:%s" : "%llx.%pOFn",
addr, node, dev_name(dev));
return;
}
......
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