Commit 0d28c600 authored by Olof Johansson's avatar Olof Johansson

Merge tag 'samsung-dt-4.10' of...

Merge tag 'samsung-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Samsung DeviceTree update for v4.10:
1. Add TOPEET itop core and Elite boards, based on Exynos4412.
2. Remove the Exynos4415 DTSI. We did not have any mainlined boards
   using it. I am also not aware of any popular out-of-tree boards using it.
3. Add Snoop Control Unit node for Exynos4.
4. Minor cleanups.

* tag 'samsung-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: Add SCU device node to exynos4.dtsi
  ARM: dts: exynos: Remove exynos4415.dtsi
  ARM: dts: exynos: Document eMMC/SD/SDIO devices in Snow and Peach boards
  ARM: dts: exynos: Add TOPEET itop elite based board
  ARM: dts: exynos: Add TOPEET itop core board SCP package version
  ARM: dts: exynos: Add entries for sound support on Odroid-XU board
  ARM: dts: exynos: Remove "simple-bus" compatible from fimc-is node
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 4ce410a2 05a3589f
......@@ -22,6 +22,9 @@ Required root node properties:
* FriendlyARM
- "friendlyarm,tiny4412" - for Exynos4412-based FriendlyARM
TINY4412 board.
* TOPEET
- "topeet,itop4412-elite" - for Exynos4412-based TOPEET
Elite base board.
* Google
- "google,pi" - for Exynos5800-based Google Peach Pi
......
......@@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \
exynos4210-smdkv310.dtb \
exynos4210-trats.dtb \
exynos4210-universal_c210.dtb \
exynos4412-itop-elite.dtb \
exynos4412-odroidu3.dtb \
exynos4412-odroidx.dtb \
exynos4412-odroidx2.dtb \
......
......@@ -78,6 +78,11 @@ chipid@10000000 {
reg = <0x10000000 0x100>;
};
scu: snoop-control-unit@10500000 {
compatible = "arm,cortex-a9-scu";
reg = <0x10500000 0x2000>;
};
memory-controller@12570000 {
compatible = "samsung,exynos4210-srom";
reg = <0x12570000 0x14>;
......
/*
* TOPEET's Exynos4412 based itop board device tree source
*
* Copyright (c) 2016 SUMOMO Computer Association
* https://www.sumomo.mobi
* Randy Li <ayaka@soulik.info>
*
* Device tree source file for TOPEET iTop Exynos 4412 core board
* which is based on Samsung's Exynos4412 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/sound/samsung-i2s.h>
#include "exynos4412-itop-scp-core.dtsi"
/ {
model = "TOPEET iTop 4412 Elite board based on Exynos4412";
compatible = "topeet,itop4412-elite", "samsung,exynos4412", "samsung,exynos4";
chosen {
bootargs = "root=/dev/mmcblk0p2 rw rootfstype=ext4 rootdelay=1 rootwait";
stdout-path = "serial2:115200n8";
};
leds {
compatible = "gpio-leds";
led2 {
label = "red:system";
gpios = <&gpx1 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
led3 {
label = "red:user";
gpios = <&gpk1 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpio-keys {
compatible = "gpio-keys";
home {
label = "GPIO Key Home";
linux,code = <KEY_HOME>;
gpios = <&gpx1 1 GPIO_ACTIVE_LOW>;
};
back {
label = "GPIO Key Back";
linux,code = <KEY_BACK>;
gpios = <&gpx1 2 GPIO_ACTIVE_LOW>;
};
sleep {
label = "GPIO Key Sleep";
linux,code = <KEY_POWER>;
gpios = <&gpx3 3 GPIO_ACTIVE_LOW>;
};
vol-up {
label = "GPIO Key Vol+";
linux,code = <KEY_UP>;
gpios = <&gpx2 1 GPIO_ACTIVE_LOW>;
};
vol-down {
label = "GPIO Key Vol-";
linux,code = <KEY_DOWN>;
gpios = <&gpx2 0 GPIO_ACTIVE_LOW>;
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "wm-sound";
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<112896000>,
<11289600>;
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&link0_codec>;
simple-audio-card,frame-master = <&link0_codec>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Speaker", "Speaker",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Speaker", "SPK_LP",
"Speaker", "SPK_LN",
"Speaker", "SPK_RP",
"Speaker", "SPK_RN",
"LINPUT1", "Mic Jack",
"LINPUT3", "Mic Jack",
"RINPUT1", "Mic Jack",
"RINPUT2", "Mic Jack";
simple-audio-card,cpu {
sound-dai = <&i2s0 0>;
};
link0_codec: simple-audio-card,codec {
sound-dai = <&codec>;
clocks = <&i2s0 CLK_I2S_CDCLK>;
system-clock-frequency = <11289600>;
};
};
beep {
compatible = "pwm-beeper";
pwms = <&pwm 0 4000000 PWM_POLARITY_INVERTED>;
};
camera: camera {
pinctrl-0 = <&cam_port_a_clk_active>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clock CLK_MOUT_CAM0>;
assigned-clock-parents = <&clock CLK_XUSBXTI>;
};
};
&adc {
vdd-supply = <&ldo3_reg>;
status = "okay";
};
&ehci {
status = "okay";
/* In order to reset USB ethernet */
samsung,vbus-gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
port@0 {
status = "okay";
};
port@2 {
status = "okay";
};
};
&exynos_usbphy {
status = "okay";
};
&fimc_0 {
status = "okay";
assigned-clocks = <&clock CLK_MOUT_FIMC0>,
<&clock CLK_SCLK_FIMC0>;
assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
assigned-clock-rates = <0>, <176000000>;
};
&hsotg {
dr_mode = "peripheral";
status = "okay";
};
&i2c_4 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
samsung,i2c-max-bus-freq = <100000>;
pinctrl-0 = <&i2c4_bus>;
pinctrl-names = "default";
status = "okay";
codec: wm8960@1a {
compatible = "wlf,wm8960";
reg = <0x1a>;
clocks = <&pmu_system_controller 0>;
clock-names = "MCLK1";
wlf,shared-lrclk;
#sound-dai-cells = <0>;
};
};
&i2s0 {
pinctrl-0 = <&i2s0_bus>;
pinctrl-names = "default";
status = "okay";
clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
};
&pinctrl_1 {
ether-reset {
samsung,pins = "gpc0-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
};
};
&pwm {
status = "okay";
pinctrl-0 = <&pwm0_out>;
pinctrl-names = "default";
samsung,pwm-outputs = <0>;
};
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
pinctrl-names = "default";
cd-gpio = <&gpx0 7 GPIO_ACTIVE_LOW>;
cap-sd-highspeed;
vmmc-supply = <&ldo23_reg>;
vqmmc-supply = <&ldo17_reg>;
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
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......@@ -147,7 +147,7 @@ fimc_lite_1: fimc-lite@123A0000 {
};
fimc_is: fimc-is@12000000 {
compatible = "samsung,exynos4212-fimc-is", "simple-bus";
compatible = "samsung,exynos4212-fimc-is";
reg = <0x12000000 0x260000>;
interrupts = <0 90 0>, <0 95 0>;
power-domains = <&pd_isp>;
......
......@@ -523,6 +523,7 @@ &i2s0 {
status = "okay";
};
/* eMMC flash */
&mmc_0 {
status = "okay";
num-slots = <1>;
......@@ -536,6 +537,7 @@ &mmc_0 {
cap-mmc-highspeed;
};
/* uSD card */
&mmc_2 {
status = "okay";
num-slots = <1>;
......@@ -553,6 +555,8 @@ &mmc_2 {
/*
* On Snow we've got SIP WiFi and so can keep drive strengths low to
* reduce EMI.
*
* WiFi SDIO module
*/
&mmc_3 {
status = "okay";
......
......@@ -15,6 +15,7 @@
#include <dt-bindings/clock/maxim,max77802.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/sound/samsung-i2s.h>
#include "exynos54xx-odroidxu-leds.dtsi"
/ {
......@@ -57,6 +58,61 @@ firmware@02073000 {
compatible = "samsung,secure-firmware";
reg = <0x02073000 0x1000>;
};
sound: sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Odroid-XU";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Speakers", "Speakers";
simple-audio-card,routing =
"Headphone Jack", "HPL",
"Headphone Jack", "HPR",
"Headphone Jack", "MICBIAS",
"IN1", "Headphone Jack",
"Speakers", "SPKL",
"Speakers", "SPKR";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&link0_codec>;
simple-audio-card,frame-master = <&link0_codec>;
simple-audio-card,cpu {
sound-dai = <&audi2s0 0>;
system-clock-frequency = <19200000>;
};
link0_codec: simple-audio-card,codec {
sound-dai = <&max98090>;
clocks = <&audi2s0 CLK_I2S_CDCLK>;
};
};
};
&audi2s0 {
status = "okay";
};
&clock {
clocks = <&fin_pll>;
assigned-clocks = <&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <192000000>;
};
&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>;
assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;
assigned-clock-rates = <0>,
<0>,
<96000000>,
<19200000>;
};
&cpu0_thermal {
......@@ -440,6 +496,19 @@ ldo35_reg: LDO35 {
};
};
&i2c_1 {
status = "okay";
max98090: max98090@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpj3>;
interrupts = <0 IRQ_TYPE_NONE>;
clocks = <&audi2s0 CLK_I2S_CDCLK>;
clock-names = "mclk";
#sound-dai-cells = <0>;
};
};
&mmc_0 {
status = "okay";
mmc-pwrseq = <&emmc_pwrseq>;
......
......@@ -615,4 +615,13 @@ gpz: gpz {
interrupt-controller;
#interrupt-cells = <2>;
};
audi2s0_bus: audi2s0-bus {
samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
"gpz-4";
samsung,pin-function = <2>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
......@@ -16,6 +16,7 @@
#include "exynos54xx.dtsi"
#include "exynos-syscon-restart.dtsi"
#include <dt-bindings/clock/exynos5410.h>
#include <dt-bindings/clock/exynos-audss-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
......@@ -82,6 +83,14 @@ clock: clock-controller@10010000 {
#clock-cells = <1>;
};
clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5410-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clocks = <&fin_pll>, <&clock CLK_FOUT_EPLL>;
clock-names = "pll_ref", "pll_in";
};
tmu_cpu0: tmu@10060000 {
compatible = "samsung,exynos5420-tmu";
reg = <0x10060000 0x100>;
......@@ -183,6 +192,56 @@ pinctrl_3: pinctrl@03860000 {
reg = <0x03860000 0x1000>;
interrupts = <0 47 0>;
};
amba {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gic>;
ranges;
pdma0: pdma@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_NONE>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: pdma@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
};
audi2s0: i2s@03830000 {
compatible = "samsung,exynos5420-i2s";
reg = <0x03830000 0x100>;
dmas = <&pdma0 10
&pdma0 9
&pdma0 8>;
dma-names = "tx", "rx", "tx-sec";
clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_SCLK_I2S>;
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
#clock-cells = <1>;
clock-output-names = "i2s_cdclk0";
#sound-dai-cells = <1>;
samsung,idma-addr = <0x03000000>;
pinctrl-names = "default";
pinctrl-0 = <&audi2s0_bus>;
status = "disabled";
};
};
thermal-zones {
......
......@@ -697,6 +697,7 @@ &i2s0 {
status = "okay";
};
/* eMMC flash */
&mmc_0 {
status = "okay";
num-slots = <1>;
......@@ -714,6 +715,7 @@ &mmc_0 {
bus-width = <8>;
};
/* WiFi SDIO module */
&mmc_1 {
status = "okay";
num-slots = <1>;
......@@ -733,6 +735,7 @@ &mmc_1 {
vqmmc-supply = <&buck10_reg>;
};
/* uSD card */
&mmc_2 {
status = "okay";
num-slots = <1>;
......
......@@ -665,6 +665,7 @@ &i2s0 {
status = "okay";
};
/* eMMC flash */
&mmc_0 {
status = "okay";
num-slots = <1>;
......@@ -683,6 +684,7 @@ &mmc_0 {
bus-width = <8>;
};
/* WiFi SDIO module */
&mmc_1 {
status = "okay";
num-slots = <1>;
......@@ -702,6 +704,7 @@ &mmc_1 {
vqmmc-supply = <&buck10_reg>;
};
/* uSD card */
&mmc_2 {
status = "okay";
num-slots = <1>;
......
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