Commit 0d60dc1d authored by James Simmons's avatar James Simmons

[FBDEV] Data in struct fb_image is now const.

[FBDEV] Updates to the logo code. We seperated it into two functions.

[I810 FBDEV] Updates to the driver. PCI hooks for PCI supsend and resume to save the AGP GART mapping during power saving.

[ATY 128] Add proper support for two graphics cards. Also added support for two more models of the Rage 128.

[SGIVW FBDEV] Updates for the SGI Visual Workstation framebuffer.
parent dede6289
......@@ -363,7 +363,7 @@ config VIDEO_SELECT
config FB_SGIVW
tristate "SGI Visual Workstation framebuffer support"
depends on FB && VISWS
depends on FB && X86_VISWS
help
SGI Visual Workstation support for framebuffer graphics.
......
......@@ -7,7 +7,7 @@
* Ani Joshi / Jeff Garzik
* - Code cleanup
*
* Michel Dnzer <michdaen@iiic.ethz.ch>
* Michel Danzer <michdaen@iiic.ethz.ch>
* - 15/16 bit cleanup
* - fix panning
*
......@@ -153,14 +153,20 @@ static struct pci_device_id aty128_pci_tbl[] __devinitdata = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RF,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RI,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RK,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_RL,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128 },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_Rage128_PD,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PF,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PR,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_PP,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U3,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, rage_128_pro },
{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RAGE128_U1,
......@@ -367,8 +373,9 @@ static int aty128_decode_var(struct fb_var_screeninfo *var,
struct aty128fb_par *par);
#if !defined(CONFIG_PPC) && !defined(__sparc__)
static void __init aty128_get_pllinfo(struct aty128fb_par *par,
char *bios_seg);
static char __init *aty128find_ROM(void);
void *bios);
static void __init *aty128_map_ROM(struct pci_dev *pdev);
static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom);
#endif
static void aty128_timings(struct aty128fb_par *par);
static void aty128_init_engine(struct aty128fb_par *par);
......@@ -1415,13 +1422,16 @@ aty128fb_setup(char *options)
#ifdef CONFIG_PMAC_PBOOK
if (!strncmp(this_opt, "lcd:", 4)) {
default_lcd_on = simple_strtoul(this_opt+4, NULL, 0);
continue;
} else if (!strncmp(this_opt, "crt:", 4)) {
default_crt_on = simple_strtoul(this_opt+4, NULL, 0);
continue;
}
#endif
#ifdef CONFIG_MTRR
if(!strncmp(this_opt, "nomtrr", 6)) {
mtrr = 0;
continue;
}
#endif
#ifdef CONFIG_ALL_PPC
......@@ -1430,6 +1440,7 @@ aty128fb_setup(char *options)
unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
if (vmode > 0 && vmode <= VMODE_MAX)
default_vmode = vmode;
continue;
} else if (!strncmp(this_opt, "cmode:", 6)) {
unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
switch (cmode) {
......@@ -1446,10 +1457,10 @@ aty128fb_setup(char *options)
default_cmode = CMODE_32;
break;
}
continue;
}
#endif /* CONFIG_ALL_PPC */
else
mode_option = this_opt;
mode_option = this_opt;
}
return 0;
}
......@@ -1488,6 +1499,9 @@ aty128_init(struct pci_dev *pdev, const struct pci_device_id *ent)
case PCI_DEVICE_ID_ATI_RAGE128_RL:
strcpy(video_card, "Rage128 RL (AGP)");
break;
case PCI_DEVICE_ID_ATI_Rage128_PD:
strcpy(video_card, "Rage128 Pro PD (PCI)");
break;
case PCI_DEVICE_ID_ATI_RAGE128_PF:
strcpy(video_card, "Rage128 Pro PF (AGP)");
break;
......@@ -1636,7 +1650,7 @@ aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
struct fb_info *info;
int err, size;
#if !defined(CONFIG_PPC) && !defined(__sparc__)
char *bios_seg = NULL;
void *bios = NULL;
#endif
/* Enable device in PCI config */
......@@ -1651,21 +1665,21 @@ aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
"aty128fb FB")) {
printk(KERN_ERR "aty128fb: cannot reserve frame "
"buffer memory\n");
goto err_free_fb;
return -ENODEV;
}
reg_addr = pci_resource_start(pdev, 2);
if (!request_mem_region(reg_addr, pci_resource_len(pdev, 2),
"aty128fb MMIO")) {
printk(KERN_ERR "aty128fb: cannot reserve MMIO region\n");
goto err_free_mmio;
goto err_free_fb;
}
/* We have the resources. Now virtualize them */
size = sizeof(struct fb_info) + sizeof(struct aty128fb_par);
if (!(info = kmalloc(size, GFP_ATOMIC))) {
printk(KERN_ERR "aty128fb: can't alloc fb_info_aty128\n");
goto err_unmap_out;
goto err_free_mmio;
}
memset(info, 0, size);
......@@ -1677,19 +1691,18 @@ aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
/* Virtualize mmio region */
info->fix.mmio_start = reg_addr;
par->regbase = ioremap(reg_addr, 0x2000);
par->regbase = ioremap(reg_addr, pci_resource_len(pdev, 2));
if (!par->regbase)
goto err_free_info;
/* Grab memory size from the card */
// How does this relate to the resource length from the PCI hardware?
par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
/* Virtualize the framebuffer */
info->screen_base = ioremap(fb_addr, par->vram_size);
if (!info->screen_base) {
iounmap(par->regbase);
goto err_free_info;
}
if (!info->screen_base)
goto err_unmap_out;
/* Set up info->fix */
info->fix = aty128fb_fix;
......@@ -1704,13 +1717,13 @@ aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
}
#if !defined(CONFIG_PPC) && !defined(__sparc__)
if (!(bios_seg = aty128find_ROM()))
printk(KERN_INFO "aty128fb: Rage128 BIOS not located. "
"Guessing...\n");
if (!(bios = aty128_map_ROM(pdev)))
printk(KERN_INFO "aty128fb: BIOS not located, guessing timings.\n");
else {
printk(KERN_INFO "aty128fb: Rage128 BIOS located at "
"segment %4.4X\n", (unsigned int)bios_seg);
aty128_get_pllinfo(par, bios_seg);
printk(KERN_INFO "aty128fb: Rage128 BIOS located at %lx\n",
pdev->resource[PCI_ROM_RESOURCE].start);
aty128_get_pllinfo(par, bios);
aty128_unmap_ROM(pdev, bios);
}
#endif
aty128_timings(par);
......@@ -1732,18 +1745,16 @@ aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
err_out:
iounmap(info->screen_base);
err_unmap_out:
iounmap(par->regbase);
err_free_info:
kfree(info);
err_unmap_out:
err_free_mmio:
release_mem_region(pci_resource_start(pdev, 2),
pci_resource_len(pdev, 2));
err_free_mmio:
err_free_fb:
release_mem_region(pci_resource_start(pdev, 0),
pci_resource_len(pdev, 0));
err_free_fb:
release_mem_region(pci_resource_start(pdev, 1),
pci_resource_len(pdev, 1));
return -ENODEV;
}
......@@ -1780,86 +1791,65 @@ static void __devexit aty128_remove(struct pci_dev *pdev)
/* PPC and Sparc cannot read video ROM */
#if !defined(CONFIG_PPC) && !defined(__sparc__)
static char * __init aty128find_ROM(void)
static void * __init aty128_map_ROM(struct pci_dev *dev)
{
u32 segstart;
char *rom_base;
char *rom;
int stage;
int i, j;
char aty_rom_sig[] = "761295520"; /* ATI ROM Signature */
char *R128_sig[] = {
"R128", /* Rage128 ROM identifier */
"128b"
};
for (segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) {
stage = 1;
rom_base = (char *)ioremap(segstart, 0x1000);
if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa))
stage = 2;
if (stage != 2) {
iounmap(rom_base);
continue;
}
rom = rom_base;
for (i = 0; (i < 128 - strlen(aty_rom_sig)) && (stage != 3); i++) {
if (aty_rom_sig[0] == *rom)
if (strncmp(aty_rom_sig, rom,
strlen(aty_rom_sig)) == 0)
stage = 3;
rom++;
}
if (stage != 3) {
iounmap(rom_base);
continue;
}
rom = rom_base;
/* ATI signature found. Let's see if it's a Rage128 */
for (i = 0; (i < 512) && (stage != 4); i++) {
for (j = 0; j < sizeof(R128_sig)/sizeof(char *);j++) {
if (R128_sig[j][0] == *rom)
if (strncmp(R128_sig[j], rom,
strlen(R128_sig[j])) == 0) {
stage = 4;
break;
}
}
rom++;
}
if (stage != 4) {
iounmap(rom_base);
continue;
}
return rom_base;
// If this is a primary card, there is a shadow copy of the
// ROM somewhere in the first meg. We will just ignore the copy
// and use the ROM directly.
// no need to search for the ROM, just ask the card where it is.
struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
// assign the ROM an address if it doesn't have one
if (r->start == 0)
pci_assign_resource(dev, PCI_ROM_RESOURCE);
// enable if needed
if (!(r->flags & PCI_ROM_ADDRESS_ENABLE))
pci_write_config_dword(dev, dev->rom_base_reg, r->start | PCI_ROM_ADDRESS_ENABLE);
unsigned char *addr = ioremap(r->start, r->end - r->start + 1);
// Very simple test to make sure it appeared
if (addr && (*addr != 0x55)) {
printk("aty128fb: Invalid ROM signature %x\n", *addr);
iounmap(addr);
return NULL;
}
return NULL;
return (void *)addr;
}
static void __init aty128_unmap_ROM(struct pci_dev *dev, void * rom)
{
iounmap(rom);
// leave it disabled and unassigned
struct resource *r = &dev->resource[PCI_ROM_RESOURCE];
r->flags &= !PCI_ROM_ADDRESS_ENABLE;
r->end -= r->start;
r->start = 0;
pci_write_config_dword(dev, dev->rom_base_reg, 0);
}
static void __init
aty128_get_pllinfo(struct aty128fb_par *par, char *bios_seg)
aty128_get_pllinfo(struct aty128fb_par *par, void *bios)
{
void *bios_header;
void *header_ptr;
u16 bios_header_offset, pll_info_offset;
PLL_BLOCK pll;
bios_header = bios_seg + 0x48L;
bios_header = (char *)bios + 0x48L;
header_ptr = bios_header;
bios_header_offset = readw(header_ptr);
bios_header = bios_seg + bios_header_offset;
bios_header = (char *)bios + bios_header_offset;
bios_header += 0x30;
header_ptr = bios_header;
pll_info_offset = readw(header_ptr);
header_ptr = bios_seg + pll_info_offset;
header_ptr = (char *)bios + pll_info_offset;
memcpy_fromio(&pll, header_ptr, 50);
......
......@@ -113,7 +113,7 @@ static inline void color_imageblit(const struct fb_image *image,
int i, n, bpp = p->var.bits_per_pixel;
unsigned long null_bits = BITS_PER_LONG - bpp;
u32 *palette = (u32 *) p->pseudo_palette;
u8 *src = image->data;
u8 *src = (u8 *) image->data;
dst2 = (unsigned long *) dst1;
for (i = image->height; i--; ) {
......@@ -173,7 +173,7 @@ static inline void slow_imageblit(const struct fb_image *image,
unsigned long *dst, *dst2, val, pitch = p->fix.line_length;
unsigned long null_bits = BITS_PER_LONG - bpp;
unsigned long spitch = (image->width+7)/8;
u8 *src = image->data, *s;
const char *src = image->data, *s;
unsigned long i, j, l;
dst2 = (unsigned long *) dst1;
......@@ -246,7 +246,7 @@ static inline void fast_imageblit(const struct fb_image *image,
u32 fgx = fgcolor, bgx = bgcolor, bpp = p->var.bits_per_pixel;
u32 ppw = BITS_PER_LONG/bpp, spitch = (image->width + 7)/8;
u32 bit_mask, end_mask, eorx, shift;
char *s = image->data, *src;
const char *s = image->data, *src;
unsigned long *dst;
u32 *tab = NULL;
int i, j, k;
......@@ -328,7 +328,7 @@ void cfb_imageblit(struct fb_info *p, const struct fb_image *image)
if (p->fbops->fb_sync)
p->fbops->fb_sync(p);
if (image->depth == 1) {
if (image->depth == 0) {
if (p->fix.visual == FB_VISUAL_TRUECOLOR ||
p->fix.visual == FB_VISUAL_DIRECTCOLOR) {
fgcolor = ((u32*)(p->pseudo_palette))[image->fg_color];
......
......@@ -555,7 +555,7 @@ void accel_cursor(struct display *p, int flags, int xx, int yy)
cursor.image.height = height;
cursor.image.dx = xx * width;
cursor.image.dy = yy * height;
cursor.image.depth = 1;
cursor.image.depth = 0;
cursor.image.data = image;
cursor.image.bg_color = bgcolor;
cursor.image.fg_color = fgcolor;
......@@ -945,6 +945,7 @@ static void fbcon_set_display(int con, int init, int logo)
int cnt;
int step;
logo_height = fb_prepare_logo(info);
logo_lines = (logo_height + vc->vc_font.height - 1) /
vc->vc_font.height;
q = (unsigned short *) (vc->vc_origin +
......@@ -1942,7 +1943,7 @@ static int fbcon_switch(struct vc_data *vc)
if (logo_shown == -2) {
logo_shown = fg_console;
/* This is protected above by initmem_freed */
logo_height = fb_show_logo(info);
fb_show_logo(info);
update_region(fg_console,
vc->vc_origin + vc->vc_size_row * vc->vc_top,
vc->vc_size_row * (vc->vc_bottom -
......
......@@ -41,7 +41,6 @@
#include <asm/pgtable.h>
#include <linux/fb.h>
#include <linux/linux_logo.h>
#ifdef CONFIG_FRAMEBUFFER_CONSOLE
#include "console/fbcon.h"
......@@ -369,6 +368,9 @@ static inline unsigned safe_shift(unsigned d, int n)
return n < 0 ? d >> -n : d << n;
}
#ifdef CONFIG_FB_LOGO
#include <linux/linux_logo.h>
static void __init fb_set_logocmap(struct fb_info *info,
const struct linux_logo *logo)
{
......@@ -511,101 +513,121 @@ static void __init fb_set_logo(struct fb_info *info,
* We isolate each bit and expand each into a byte. The "needs_logo" flag will
* be set to 1.
*/
int fb_show_logo(struct fb_info *info)
{
unsigned char *fb = info->screen_base, *logo_new = NULL;
u32 *palette = NULL, *saved_pseudo_palette = NULL;
int needs_directpalette = 0;
int needs_truepalette = 0;
int needs_cmapreset = 0;
struct fb_image image;
const struct linux_logo *logo = 0;
static struct logo_data {
int depth;
int needs_logo;
int needs_directpalette;
int needs_truepalette;
int needs_cmapreset;
int type;
int needs_logo = 0;
int done = 0, x;
const struct linux_logo *logo;
} fb_logo;
/* Return if the frame buffer is not mapped */
if (!fb || !info->fbops->fb_imageblit)
return 0;
image.depth = info->var.bits_per_pixel;
/* reasonable default */
if (image.depth >= 8)
type = LINUX_LOGO_CLUT224;
else if (image.depth >= 4)
type = LINUX_LOGO_VGA16;
else
type = LINUX_LOGO_MONO;
/* Return if no suitable logo was found */
logo = fb_find_logo(type);
if (!logo || logo->height > info->var.yres)
return 0;
int fb_prepare_logo(struct fb_info *info)
{
memset(&fb_logo, 0, sizeof(struct logo_data));
image.data = logo->data;
fb_logo.depth = info->var.bits_per_pixel;
switch (info->fix.visual) {
case FB_VISUAL_TRUECOLOR:
needs_truepalette = 1;
if (image.depth >= 4 && image.depth <= 8)
needs_logo = 4;
else if (image.depth < 4)
needs_logo = 1;
if (fb_logo.depth >= 8) {
fb_logo.needs_truepalette = 1;
fb_logo.needs_logo = 8;
} else if (fb_logo.depth >= 4)
fb_logo.needs_logo = 4;
else
fb_logo.needs_logo = 1;
break;
case FB_VISUAL_DIRECTCOLOR:
if (image.depth >= 24) {
needs_directpalette = 1;
needs_cmapreset = 1;
if (fb_logo.depth >= 24) {
fb_logo.needs_directpalette = 1;
fb_logo.needs_cmapreset = 1;
fb_logo.needs_logo = 8;
}
/* 16 colors */
else if (image.depth >= 16)
needs_logo = 4;
else if (fb_logo.depth >= 16)
fb_logo.needs_logo = 4;
/* 2 colors */
else
needs_logo = 1;
fb_logo.needs_logo = 1;
break;
case FB_VISUAL_MONO01:
/* reversed 0 = fg, 1 = bg */
needs_logo = ~1;
fb_logo.needs_logo = ~1;
break;
case FB_VISUAL_MONO10:
needs_logo = 1;
fb_logo.needs_logo = 1;
break;
case FB_VISUAL_PSEUDOCOLOR:
default:
if (image.depth >= 8)
needs_cmapreset = 1;
if (fb_logo.depth >= 8) {
fb_logo.needs_cmapreset = 1;
fb_logo.needs_logo = 8;
}
/* fall through */
case FB_VISUAL_STATIC_PSEUDOCOLOR:
/* 16 colors */
if (image.depth >= 4 && image.depth < 8)
needs_logo = 4;
if (fb_logo.depth >= 4 && fb_logo.depth < 8)
fb_logo.needs_logo = 4;
/* 2 colors */
else if (image.depth < 4)
needs_logo = 1;
else if (fb_logo.depth < 4)
fb_logo.needs_logo = 1;
break;
}
if (needs_cmapreset)
fb_set_logocmap(info, logo);
if (fb_logo.needs_logo >= 8)
fb_logo.type = LINUX_LOGO_CLUT224;
else if (fb_logo.needs_logo >= 4)
fb_logo.type = LINUX_LOGO_VGA16;
else
fb_logo.type = LINUX_LOGO_MONO;
/* Return if no suitable logo was found */
fb_logo.logo = fb_find_logo(fb_logo.type);
if (!fb_logo.logo || fb_logo.logo->height > info->var.yres) {
fb_logo.logo = NULL;
return 0;
}
return fb_logo.logo->height;
}
int fb_show_logo(struct fb_info *info)
{
unsigned char *fb = info->screen_base, *logo_new = NULL;
u32 *palette = NULL, *saved_pseudo_palette = NULL;
struct fb_image image;
int x;
/* Return if the frame buffer is not mapped */
if (!fb || !info->fbops->fb_imageblit ||
fb_logo.logo == NULL)
return 0;
image.depth = fb_logo.depth;
image.data = fb_logo.logo->data;
if (needs_truepalette || needs_directpalette) {
if (fb_logo.needs_cmapreset)
fb_set_logocmap(info, fb_logo.logo);
if (fb_logo.needs_truepalette ||
fb_logo.needs_directpalette) {
palette = kmalloc(256 * 4, GFP_KERNEL);
if (palette == NULL)
return 0;
if (needs_truepalette)
fb_set_logo_truepalette(info, logo, palette);
if (fb_logo.needs_truepalette)
fb_set_logo_truepalette(info, fb_logo.logo, palette);
else
fb_set_logo_directpalette(info, logo, palette);
fb_set_logo_directpalette(info, fb_logo.logo, palette);
saved_pseudo_palette = info->pseudo_palette;
info->pseudo_palette = palette;
}
if (needs_logo) {
logo_new = kmalloc(logo->width * logo->height, GFP_KERNEL);
if (fb_logo.needs_logo != 8) {
logo_new = kmalloc(fb_logo.logo->width * fb_logo.logo->height,
GFP_KERNEL);
if (logo_new == NULL) {
if (palette)
kfree(palette);
......@@ -615,28 +637,31 @@ int fb_show_logo(struct fb_info *info)
}
image.data = logo_new;
fb_set_logo(info, logo, logo_new, needs_logo);
fb_set_logo(info, fb_logo.logo, logo_new, fb_logo.needs_logo);
}
image.width = logo->width;
image.height = logo->height;
image.width = fb_logo.logo->width;
image.height = fb_logo.logo->height;
image.dy = 0;
for (x = 0; x < num_online_cpus() * (logo->width + 8) &&
x <= info->var.xres-logo->width; x += (logo->width + 8)) {
for (x = 0; x < num_online_cpus() * (fb_logo.logo->width + 8) &&
x <= info->var.xres-fb_logo.logo->width; x += (fb_logo.logo->width + 8)) {
image.dx = x;
info->fbops->fb_imageblit(info, &image);
done = 1;
}
if (palette != NULL)
kfree(palette);
if (saved_pseudo_palette != NULL)
info->pseudo_palette = saved_pseudo_palette;
if (logo_new != NULL)
kfree(logo_new);
return logo->height;
return fb_logo.logo->height;
}
#else
int fb_prepare_logo(struct fb_info *info) { return 0; }
int fb_show_logo(struct fb_info *info) { return 0; }
#endif /* CONFIG_FB_LOGO */
static int fbmem_read_proc(char *buf, char **start, off_t offset,
int len, int *eof, void *private)
......@@ -1212,6 +1237,7 @@ EXPORT_SYMBOL(register_framebuffer);
EXPORT_SYMBOL(unregister_framebuffer);
EXPORT_SYMBOL(num_registered_fb);
EXPORT_SYMBOL(registered_fb);
EXPORT_SYMBOL(fb_prepare_logo);
EXPORT_SYMBOL(fb_show_logo);
EXPORT_SYMBOL(fb_set_var);
EXPORT_SYMBOL(fb_blank);
......
......@@ -256,6 +256,7 @@ struct i810fb_par {
drm_agp_t *drm_agp;
atomic_t use_count;
u32 pseudo_palette[17];
u32 pci_state[16];
unsigned long mmio_start_phys;
u8 *mmio_start_virtual;
u32 cursor_reset;
......@@ -273,6 +274,7 @@ struct i810fb_par {
u32 depth;
u32 blit_bpp;
u32 ovract;
u32 cur_state;
int mtrr_reg;
u16 bltcntl;
u8 interlace;
......
......@@ -315,19 +315,19 @@ static inline void i810fb_iring_enable(struct i810fb_par *par, u32 mode)
i810_writel(IRING + 12, mmio, tmp);
}
void i810fb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
void i810fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
struct i810fb_par *par = (struct i810fb_par *) p->par;
struct i810fb_par *par = (struct i810fb_par *) info->par;
u32 dx, dy, width, height, dest, rop = 0, color = 0;
if (!p->var.accel_flags || par->dev_flags & LOCKUP ||
if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
par->depth == 4)
return cfb_fillrect(p, rect);
return cfb_fillrect(info, rect);
if (par->depth == 1)
color = rect->color;
else
color = ((u32 *) (p->pseudo_palette))[rect->color];
color = ((u32 *) (info->pseudo_palette))[rect->color];
rop = i810fb_rop[rect->rop];
......@@ -336,19 +336,19 @@ void i810fb_fillrect(struct fb_info *p, const struct fb_fillrect *rect)
dy = rect->dy;
height = rect->height;
dest = p->fix.smem_start + (dy * p->fix.line_length) + dx;
color_blit(width, height, p->fix.line_length, dest, rop, color,
dest = info->fix.smem_start + (dy * info->fix.line_length) + dx;
color_blit(width, height, info->fix.line_length, dest, rop, color,
par->blit_bpp, par);
}
void i810fb_copyarea(struct fb_info *p, struct fb_copyarea *region)
void i810fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
{
struct i810fb_par *par = (struct i810fb_par *) p->par;
struct i810fb_par *par = (struct i810fb_par *) info->par;
u32 sx, sy, dx, dy, pitch, width, height, src, dest, xdir;
if (!p->var.accel_flags || par->dev_flags & LOCKUP ||
if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
par->depth == 4)
return cfb_copyarea(p, region);
return cfb_copyarea(info, region);
dx = region->dx * par->depth;
sx = region->sx * par->depth;
......@@ -366,66 +366,68 @@ void i810fb_copyarea(struct fb_info *p, struct fb_copyarea *region)
dx += width - 1;
}
if (dy <= sy) {
pitch = p->fix.line_length;
pitch = info->fix.line_length;
}
else {
pitch = (-(p->fix.line_length)) & 0xFFFF;
pitch = (-(info->fix.line_length)) & 0xFFFF;
sy += height - 1;
dy += height - 1;
}
src = p->fix.smem_start + (sy * p->fix.line_length) + sx;
dest = p->fix.smem_start + (dy * p->fix.line_length) + dx;
src = info->fix.smem_start + (sy * info->fix.line_length) + sx;
dest = info->fix.smem_start + (dy * info->fix.line_length) + dx;
source_copy_blit(width, height, pitch, xdir, src, dest,
PAT_COPY_ROP, par->blit_bpp, par);
}
void i810fb_imageblit(struct fb_info *p, struct fb_image *image)
void i810fb_imageblit(struct fb_info *info, const struct fb_image *image)
{
struct i810fb_par *par = (struct i810fb_par *) p->par;
struct i810fb_par *par = (struct i810fb_par *) info->par;
u32 fg = 0, bg = 0, s_pitch, d_pitch, size, offset, dst, i, j;
u8 *s_addr, *d_addr;
if (!p->var.accel_flags || par->dev_flags & LOCKUP ||
par->depth == 4 || image->depth != 1)
return cfb_imageblit(p, image);
if (!info->var.accel_flags || par->dev_flags & LOCKUP ||
par->depth == 4 || image->depth != 0)
return cfb_imageblit(info, image);
switch (p->var.bits_per_pixel) {
switch (info->var.bits_per_pixel) {
case 8:
fg = image->fg_color;
bg = image->bg_color;
break;
case 16:
case 24:
fg = ((u32 *)(p->pseudo_palette))[image->fg_color];
bg = ((u32 *)(p->pseudo_palette))[image->bg_color];
fg = ((u32 *)(info->pseudo_palette))[image->fg_color];
bg = ((u32 *)(info->pseudo_palette))[image->bg_color];
break;
}
dst = p->fix.smem_start + (image->dy * p->fix.line_length) +
dst = info->fix.smem_start + (image->dy * info->fix.line_length) +
(image->dx * par->depth);
s_pitch = (image->width+7)/8;
d_pitch = (s_pitch + 1) & ~1;
size = (d_pitch * image->height) + 7;
size &= ~7;
if (image->width & 15) {
size = d_pitch * image->height;
if (s_pitch != d_pitch || size & 7) {
size += 7;
size &= ~7;
offset = get_buffer_offset(size, par);
d_addr = par->pixmap.virtual + offset;
s_addr = image->data;
s_addr = (u8 *) image->data;
for (i = image->height; i--; ) {
for (j = 0; j < s_pitch; j++)
i810_writeb(j, d_addr, s_addr[j]);
s_addr += s_pitch;
d_addr += d_pitch;
if (s_pitch == d_pitch) {
memcpy_toio(d_addr, s_addr, s_pitch * image->height);
} else {
for (i = image->height; i--; ) {
for (j = 0; j < s_pitch; j++)
i810_writeb(j, d_addr, s_addr[j]);
s_addr += s_pitch;
d_addr += d_pitch;
}
}
mono_src_copy_blit(image->width * par->depth, image->height,
p->fix.line_length, size/8, par->blit_bpp,
PAT_COPY_ROP, dst,
info->fix.line_length, size/8,
par->blit_bpp, PAT_COPY_ROP, dst,
par->pixmap.physical + offset,
bg, fg, par);
}
......@@ -434,18 +436,18 @@ void i810fb_imageblit(struct fb_info *p, struct fb_image *image)
*/
else {
mono_src_copy_imm_blit(image->width * par->depth,
image->height, p->fix.line_length,
image->height, info->fix.line_length,
size/4, par->blit_bpp,
PAT_COPY_ROP, dst, (u32 *) image->data,
bg, fg, par);
}
}
int i810fb_sync(struct fb_info *p)
int i810fb_sync(struct fb_info *info)
{
struct i810fb_par *par = (struct i810fb_par *) p->par;
struct i810fb_par *par = (struct i810fb_par *) info->par;
if (!p->var.accel_flags || par->dev_flags & LOCKUP)
if (!info->var.accel_flags || par->dev_flags & LOCKUP)
return 0;
return wait_for_engine_idle(par);
......
......@@ -1436,6 +1436,68 @@ static struct fb_ops i810fb_ops __initdata = {
.fb_sync = i810fb_sync,
};
/***********************************************************************
* Power Management *
***********************************************************************/
static int i810fb_suspend(struct pci_dev *dev, u32 state)
{
struct fb_info *info = pci_get_drvdata(dev);
struct i810fb_par *par = (struct i810fb_par *) info->par;
int blank = 0, prev_state = par->cur_state;
if (state == prev_state)
return 0;
par->cur_state = state;
switch (state) {
case 1:
blank = VESA_VSYNC_SUSPEND;
break;
case 2:
blank = VESA_HSYNC_SUSPEND;
break;
case 3:
blank = VESA_POWERDOWN;
break;
default:
return -EINVAL;
}
info->fbops->fb_blank(blank, info);
if (!prev_state) {
par->drm_agp->unbind_memory(par->i810_gtt.i810_fb_memory);
par->drm_agp->unbind_memory(par->i810_gtt.i810_cursor_memory);
pci_disable_device(dev);
}
pci_save_state(dev, par->pci_state);
pci_set_power_state(dev, state);
return 0;
}
static int i810fb_resume(struct pci_dev *dev)
{
struct fb_info *info = pci_get_drvdata(dev);
struct i810fb_par *par = (struct i810fb_par *) info->par;
if (par->cur_state == 0)
return 0;
pci_restore_state(dev, par->pci_state);
pci_set_power_state(dev, 0);
pci_enable_device(dev);
par->drm_agp->bind_memory(par->i810_gtt.i810_fb_memory,
par->fb.offset);
par->drm_agp->bind_memory(par->i810_gtt.i810_cursor_memory,
par->cursor_heap.offset);
info->fbops->fb_blank(VESA_NO_BLANKING, info);
par->cur_state = 0;
return 0;
}
/***********************************************************************
* AGP resource allocation *
***********************************************************************/
......@@ -1469,13 +1531,13 @@ static void __init i810_fix_offsets(struct i810fb_par *par)
par->fb.offset = v_offset_default << 20;
par->fb.offset >>= 12;
par->iring.offset = par->fb.offset + (par->fb.size >> 12);
par->iring.size = RINGBUFFER_SIZE;
par->pixmap.offset = par->iring.offset + (RINGBUFFER_SIZE >> 12);
par->pixmap.offset = par->fb.offset + (par->fb.size >> 12);
par->pixmap.size = PIXMAP_SIZE;
par->cursor_heap.offset = par->pixmap.offset + (PIXMAP_SIZE >> 12);
par->iring.offset = par->pixmap.offset + (PIXMAP_SIZE >> 12);
par->iring.size = RINGBUFFER_SIZE;
par->cursor_heap.offset = par->iring.offset + (RINGBUFFER_SIZE >> 12);
par->cursor_heap.size = 4096;
}
......@@ -1817,12 +1879,16 @@ static int __init i810fb_init_pci (struct pci_dev *dev,
vfreq = hfreq/(info->var.yres + info->var.upper_margin +
info->var.vsync_len + info->var.lower_margin);
printk("fb: %s v%d.%d.%d%s, (c) Tony Daplas\n"
" Video RAM : %dK\n"
" Mode : %dx%d-%dbpp@%dHz\n",
printk("I810FB: fb%d : %s v%d.%d.%d%s\n"
"I810FB: Video RAM : %dK\n"
"I810FB: Monitor : H: %d-%d KHz V: %d-%d Hz\n"
"I810FB: Mode : %dx%d-%dbpp@%dHz\n",
minor(info->node),
i810_pci_list[entry->driver_data],
VERSION_MAJOR, VERSION_MINOR, VERSION_TEENIE, BRANCH_VERSION,
(int) par->fb.size>>10, info->var.xres,
(int) par->fb.size>>10, info->monspecs.hfmin/1000,
info->monspecs.hfmax/1000, info->monspecs.vfmin,
info->monspecs.vfmax, info->var.xres,
info->var.yres, info->var.bits_per_pixel, vfreq);
return 0;
}
......@@ -1893,7 +1959,10 @@ int __init i810fb_init(void)
return -ENODEV;
}
return (pci_module_init(&i810fb_driver));
if (pci_register_driver(&i810fb_driver) > 0)
return 0;
pci_unregister_driver(&i810fb_driver);
return -ENODEV;
}
#endif
......@@ -1909,7 +1978,10 @@ int __init i810fb_init(void)
hsync1 *= 1000;
hsync2 *= 1000;
return (pci_module_init(&i810fb_driver));
if (pci_register_driver(&i810fb_driver) > 0)
return 0;
pci_unregister_driver(&i810fb_driver);
return -ENODEV;
}
MODULE_PARM(vram, "i");
......
......@@ -43,12 +43,16 @@ static struct pci_device_id i810fb_pci_tbl[] __initdata = {
static int __init i810fb_init_pci (struct pci_dev *dev,
const struct pci_device_id *entry);
static void __exit i810fb_remove_pci(struct pci_dev *dev);
static int i810fb_resume(struct pci_dev *dev);
static int i810fb_suspend(struct pci_dev *dev, u32 state);
static struct pci_driver i810fb_driver = {
.name = "i810fb",
.id_table = i810fb_pci_tbl,
.probe = i810fb_init_pci,
.remove = __exit_p(i810fb_remove_pci),
.suspend = i810fb_suspend,
.resume = i810fb_resume,
};
static int i810_init __initdata = 0;
......@@ -121,9 +125,11 @@ extern void i810fb_encode_registers(const struct fb_var_screeninfo *var,
extern void i810fb_fill_var_timings(struct fb_var_screeninfo *var);
/* Accelerated Functions */
extern void i810fb_fillrect (struct fb_info *p, const struct fb_fillrect *rect);
extern void i810fb_copyarea (struct fb_info *p, struct fb_copyarea *region);
extern void i810fb_imageblit(struct fb_info *p, struct fb_image *image);
extern void i810fb_fillrect (struct fb_info *p,
const struct fb_fillrect *rect);
extern void i810fb_copyarea (struct fb_info *p,
const struct fb_copyarea *region);
extern void i810fb_imageblit(struct fb_info *p, const struct fb_image *image);
extern int i810fb_sync (struct fb_info *p);
extern void i810fb_init_ringbuffer (struct i810fb_par *par);
......
......@@ -46,7 +46,7 @@
#include <video/fbcon-cfb16.h>
#include <video/fbcon-cfb24.h>
#include <video/fbcon-cfb32.h>
#include "pm2fb.h"
#include <video/pm2fb.h>
#include "cvisionppc.h"
#ifdef __sparc__
#include <asm/pbm.h>
......
/*
* Permedia2 framebuffer driver definitions.
* Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
* --------------------------------------------------------------------------
* $Id: pm2fb.h,v 1.21 1999/01/28 13:18:07 illo Exp $
* --------------------------------------------------------------------------
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef PM2FB_H
#define PM2FB_H
#define PM2_REFERENCE_CLOCK 14318 /* in KHz */
#define PM2_MAX_PIXCLOCK 230000 /* in KHz */
#define PM2_REGS_SIZE 0x10000
#define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
/*****************************************************************************
* Permedia2 registers used in the framebuffer
*****************************************************************************/
#define PM2R_RESET_STATUS 0x0000
#define PM2R_IN_FIFO_SPACE 0x0018
#define PM2R_OUT_FIFO_WORDS 0x0020
#define PM2R_APERTURE_ONE 0x0050
#define PM2R_APERTURE_TWO 0x0058
#define PM2R_FIFO_DISCON 0x0068
#define PM2R_CHIP_CONFIG 0x0070
#define PM2R_REBOOT 0x1000
#define PM2R_MEM_CONTROL 0x1040
#define PM2R_BOOT_ADDRESS 0x1080
#define PM2R_MEM_CONFIG 0x10c0
#define PM2R_BYPASS_WRITE_MASK 0x1100
#define PM2R_FRAMEBUFFER_WRITE_MASK 0x1140
#define PM2R_OUT_FIFO 0x2000
#define PM2R_SCREEN_BASE 0x3000
#define PM2R_SCREEN_STRIDE 0x3008
#define PM2R_H_TOTAL 0x3010
#define PM2R_HG_END 0x3018
#define PM2R_HB_END 0x3020
#define PM2R_HS_START 0x3028
#define PM2R_HS_END 0x3030
#define PM2R_V_TOTAL 0x3038
#define PM2R_VB_END 0x3040
#define PM2R_VS_START 0x3048
#define PM2R_VS_END 0x3050
#define PM2R_VIDEO_CONTROL 0x3058
#define PM2R_LINE_COUNT 0x3070
#define PM2R_FIFO_CONTROL 0x3078
#define PM2R_RD_PALETTE_WRITE_ADDRESS 0x4000
#define PM2R_RD_PALETTE_DATA 0x4008
#define PM2R_RD_PALETTE_READ_ADDRESS 0x4018
#define PM2R_RD_INDEXED_DATA 0x4050
#define PM2R_START_X_DOM 0x8000
#define PM2R_D_X_DOM 0x8008
#define PM2R_START_X_SUB 0x8010
#define PM2R_D_X_SUB 0x8018
#define PM2R_START_Y 0x8020
#define PM2R_D_Y 0x8028
#define PM2R_COUNT 0x8030
#define PM2R_RENDER 0x8038
#define PM2R_RECTANGLE_ORIGIN 0x80d0
#define PM2R_RECTANGLE_SIZE 0x80d8
#define PM2R_PACKED_DATA_LIMITS 0x8150
#define PM2R_SCISSOR_MODE 0x8180
#define PM2R_SCREEN_SIZE 0x8198
#define PM2R_AREA_STIPPLE_MODE 0x81a0
#define PM2R_WINDOW_ORIGIN 0x81c8
#define PM2R_TEXTURE_ADDRESS_MODE 0x8380
#define PM2R_TEXTURE_MAP_FORMAT 0x8588
#define PM2R_TEXTURE_DATA_FORMAT 0x8590
#define PM2R_TEXTURE_READ_MODE 0x8670
#define PM2R_TEXEL_LUT_MODE 0x8678
#define PM2R_TEXTURE_COLOR_MODE 0x8680
#define PM2R_FOG_MODE 0x8690
#define PM2R_COLOR_DDA_MODE 0x87e0
#define PM2R_ALPHA_BLEND_MODE 0x8810
#define PM2R_DITHER_MODE 0x8818
#define PM2R_FB_SOFT_WRITE_MASK 0x8820
#define PM2R_LOGICAL_OP_MODE 0x8828
#define PM2R_LB_READ_MODE 0x8880
#define PM2R_LB_READ_FORMAT 0x8888
#define PM2R_LB_SOURCE_OFFSET 0x8890
#define PM2R_LB_WINDOW_BASE 0x88b8
#define PM2R_LB_WRITE_FORMAT 0x88c8
#define PM2R_STENCIL_MODE 0x8988
#define PM2R_DEPTH_MODE 0x89a0
#define PM2R_FB_READ_MODE 0x8a80
#define PM2R_FB_SOURCE_OFFSET 0x8a88
#define PM2R_FB_PIXEL_OFFSET 0x8a90
#define PM2R_FB_WINDOW_BASE 0x8ab0
#define PM2R_FB_WRITE_MODE 0x8ab8
#define PM2R_FB_HARD_WRITE_MASK 0x8ac0
#define PM2R_FB_BLOCK_COLOR 0x8ac8
#define PM2R_FB_READ_PIXEL 0x8ad0
#define PM2R_FILTER_MODE 0x8c00
#define PM2R_SYNC 0x8c40
#define PM2R_YUV_MODE 0x8f00
#define PM2R_STATISTICS_MODE 0x8c08
#define PM2R_FB_SOURCE_DELTA 0x8d88
#define PM2R_CONFIG 0x8d90
/* Permedia2v */
#define PM2VR_RD_INDEX_LOW 0x4020
#define PM2VR_RD_INDEX_HIGH 0x4028
#define PM2VR_RD_INDEXED_DATA 0x4030
/* Permedia2 RAMDAC indexed registers */
#define PM2I_RD_CURSOR_CONTROL 0x06
#define PM2I_RD_COLOR_MODE 0x18
#define PM2I_RD_MODE_CONTROL 0x19
#define PM2I_RD_MISC_CONTROL 0x1e
#define PM2I_RD_PIXEL_CLOCK_A1 0x20
#define PM2I_RD_PIXEL_CLOCK_A2 0x21
#define PM2I_RD_PIXEL_CLOCK_A3 0x22
#define PM2I_RD_PIXEL_CLOCK_STATUS 0x29
#define PM2I_RD_MEMORY_CLOCK_1 0x30
#define PM2I_RD_MEMORY_CLOCK_2 0x31
#define PM2I_RD_MEMORY_CLOCK_3 0x32
#define PM2I_RD_MEMORY_CLOCK_STATUS 0x33
#define PM2I_RD_COLOR_KEY_CONTROL 0x40
#define PM2I_RD_OVERLAY_KEY 0x41
#define PM2I_RD_RED_KEY 0x42
#define PM2I_RD_GREEN_KEY 0x43
#define PM2I_RD_BLUE_KEY 0x44
/* Permedia2v extensions */
#define PM2VI_RD_MISC_CONTROL 0x000
#define PM2VI_RD_SYNC_CONTROL 0x001
#define PM2VI_RD_DAC_CONTROL 0x002
#define PM2VI_RD_PIXEL_SIZE 0x003
#define PM2VI_RD_COLOR_FORMAT 0x004
#define PM2VI_RD_CURSOR_MODE 0x005
#define PM2VI_RD_CURSOR_X_LOW 0x007
#define PM2VI_RD_CURSOR_X_HIGH 0x008
#define PM2VI_RD_CURSOR_Y_LOW 0x009
#define PM2VI_RD_CURSOR_Y_HIGH 0x00A
#define PM2VI_RD_CURSOR_X_HOT 0x00B
#define PM2VI_RD_CURSOR_Y_HOT 0x00C
#define PM2VI_RD_CLK0_PRESCALE 0x201
#define PM2VI_RD_CLK0_FEEDBACK 0x202
#define PM2VI_RD_CLK0_POSTSCALE 0x203
#define PM2VI_RD_CLK1_PRESCALE 0x204
#define PM2VI_RD_CLK1_FEEDBACK 0x205
#define PM2VI_RD_CLK1_POSTSCALE 0x206
#define PM2VI_RD_CURSOR_PALETTE 0x303
#define PM2VI_RD_CURSOR_PATTERN 0x400
/* Fields and flags */
#define PM2F_RENDER_AREASTIPPLE (1L<<0)
#define PM2F_RENDER_FASTFILL (1L<<3)
#define PM2F_RENDER_PRIMITIVE_MASK (3L<<6)
#define PM2F_RENDER_LINE 0
#define PM2F_RENDER_TRAPEZOID (1L<<6)
#define PM2F_RENDER_POINT (2L<<6)
#define PM2F_RENDER_RECTANGLE (3L<<6)
#define PM2F_SYNCHRONIZATION (1L<<10)
#define PM2F_PLL_LOCKED 0x10
#define PM2F_BEING_RESET (1L<<31)
#define PM2F_DATATYPE_COLOR 0x8000
#define PM2F_VGA_ENABLE 0x02
#define PM2F_VGA_FIXED 0x04
#define PM2F_FB_WRITE_ENABLE 0x01
#define PM2F_FB_READ_SOURCE_ENABLE 0x0200
#define PM2F_RD_PALETTE_WIDTH_8 0x02
#define PM2F_PART_PROD_MASK 0x01ff
#define PM2F_SCREEN_SCISSOR_ENABLE 0x02
#define PM2F_DATA_64_ENABLE 0x00010000
#define PM2F_BLANK_LOW 0x02
#define PM2F_HSYNC_MASK 0x18
#define PM2F_VSYNC_MASK 0x60
#define PM2F_HSYNC_ACT_HIGH 0x08
#define PM2F_HSYNC_FORCED_LOW 0x10
#define PM2F_HSYNC_ACT_LOW 0x18
#define PM2F_VSYNC_ACT_HIGH 0x20
#define PM2F_VSYNC_FORCED_LOW 0x40
#define PM2F_VSYNC_ACT_LOW 0x60
#define PM2F_LINE_DOUBLE 0x04
#define PM2F_VIDEO_ENABLE 0x01
#define PM2F_RD_GUI_ACTIVE 0x10
#define PM2F_RD_COLOR_MODE_RGB 0x20
#define PM2F_RD_TRUECOLOR 0x80
#define PM2F_NO_ALPHA_BUFFER 0x10
#define PM2F_TEXTEL_SIZE_16 0x00080000
#define PM2F_TEXTEL_SIZE_32 0x00100000
#define PM2F_TEXTEL_SIZE_4 0x00180000
#define PM2F_TEXTEL_SIZE_24 0x00200000
#define PM2F_INCREASE_X (1L<<21)
#define PM2F_INCREASE_Y (1L<<22)
#define PM2F_CONFIG_FB_WRITE_ENABLE (1L<<3)
#define PM2F_CONFIG_FB_PACKED_DATA (1L<<2)
#define PM2F_CONFIG_FB_READ_DEST_ENABLE (1L<<1)
#define PM2F_CONFIG_FB_READ_SOURCE_ENABLE (1L<<0)
#define PM2F_COLOR_KEY_TEST_OFF (1L<<4)
#define PM2F_MEM_CONFIG_RAM_MASK (3L<<29)
#define PM2F_MEM_BANKS_1 0L
#define PM2F_MEM_BANKS_2 (1L<<29)
#define PM2F_MEM_BANKS_3 (2L<<29)
#define PM2F_MEM_BANKS_4 (3L<<29)
typedef enum {
PM2_TYPE_PERMEDIA2,
PM2_TYPE_PERMEDIA2V
} pm2type_t;
#endif /* PM2FB_H */
/*****************************************************************************
* That's all folks!
*****************************************************************************/
......@@ -77,6 +77,7 @@
#include <video/fbcon-cfb16.h>
#include <video/fbcon-cfb24.h>
#include <video/fbcon-cfb32.h>
#include <video/pm3fb.h>
#include <asm/io.h>
#include <asm/uaccess.h>
......@@ -85,8 +86,6 @@
#include <asm/prom.h>
#endif
#include "pm3fb.h"
/* ************************************* */
/* ***** The various "global" data ***** */
/* ************************************* */
......
......@@ -286,7 +286,6 @@ MODULE_DEVICE_TABLE(pci, rivafb_pci_tbl);
/* command line data, set in rivafb_setup() */
static u32 pseudo_palette[17];
static int noblink = 0;
static int flatpanel __initdata = -1; /* Autodetect later */
static int forceCRTC __initdata = -1;
#ifdef CONFIG_MTRR
......@@ -1380,15 +1379,16 @@ static inline void convert_bgcolor_16(u32 *col)
* CALLED FROM:
* framebuffer hook
*/
static void rivafb_imageblit(struct fb_info *info, const struct fb_image *image)
static void rivafb_imageblit(struct fb_info *info,
const struct fb_image *image)
{
struct riva_par *par = (struct riva_par *) info->par;
u32 fgx = 0, bgx = 0, width, mod, tmp;
u8 *cdat = image->data;
u8 *cdat = (u8 *) image->data;
volatile u32 *d;
int i, j, k, size;
if (image->depth != 1) {
if (image->depth != 0) {
wait_for_idle(par);
cfb_imageblit(info, image);
return;
......@@ -1854,8 +1854,8 @@ static int __init rivafb_probe(struct pci_dev *pd,
default_par->riva.PCRTC = default_par->riva.PCRTC0 = default_par->riva.PGRAPH;
}
rivafb_fix.smem_len = default_par->riva.RamAmountKBytes * 1024;
default_par->dclk_max = default_par->riva.MaxVClockFreqKHz * 1000;
rivafb_fix.smem_len = riva_get_memlen(default_par) * 1024;
default_par->dclk_max = riva_get_maxdclk(default_par) * 1000;
if (!request_mem_region(rivafb_fix.smem_start,
rivafb_fix.smem_len, "rivafb")) {
......@@ -1976,8 +1976,6 @@ int __init rivafb_setup(char *options)
while ((this_opt = strsep(&options, ",")) != NULL) {
if (!*this_opt)
continue;
if (!strncmp(this_opt, "noblink", 7)) {
noblink = 1;
#ifdef CONFIG_MTRR
} else if (!strncmp(this_opt, "nomtrr", 6)) {
nomtrr = 1;
......@@ -2016,7 +2014,10 @@ static struct pci_driver rivafb_driver = {
int __init rivafb_init(void)
{
return pci_module_init(&rivafb_driver);
if (pci_register_driver(&rivafb_driver) > 0)
return 0;
pci_unregister_driver(&rivafb_driver);
return -ENODEV;
}
......@@ -2029,8 +2030,6 @@ static void __exit rivafb_exit(void)
module_init(rivafb_init);
module_exit(rivafb_exit);
MODULE_PARM(noblink, "i");
MODULE_PARM_DESC(noblink, "Disables hardware cursor blinking (0 or 1=disabled) (default=0)");
MODULE_PARM(flatpanel, "i");
MODULE_PARM_DESC(flatpanel, "Enables experimental flat panel support for some chipsets. (0 or 1=enabled) (default=0)");
MODULE_PARM(forceCRTC, "i");
......
......@@ -35,6 +35,7 @@
5 20:47:06 mvojkovi Exp $ */
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include "nv_type.h"
#include "rivafb.h"
......@@ -133,6 +134,159 @@ riva_is_second(struct riva_par *par)
riva_override_CRTC(par);
}
unsigned long riva_get_memlen(struct riva_par *par)
{
RIVA_HW_INST *chip = &par->riva;
unsigned long memlen = 0;
unsigned int chipset = par->Chipset;
struct pci_dev* dev;
int amt;
switch (chip->Architecture) {
case NV_ARCH_03:
if (chip->PFB[0x00000000/4] & 0x00000020) {
if (((chip->PMC[0x00000000/4] & 0xF0) == 0x20)
&& ((chip->PMC[0x00000000/4] & 0x0F) >= 0x02)) {
/*
* SDRAM 128 ZX.
*/
switch (chip->PFB[0x00000000/4] & 0x03) {
case 2:
memlen = 1024 * 4;
break;
case 1:
memlen = 1024 * 2;
break;
default:
memlen = 1024 * 8;
break;
}
} else {
memlen = 1024 * 8;
}
} else {
/*
* SGRAM 128.
*/
switch (chip->PFB[0x00000000/4] & 0x00000003) {
case 0:
memlen = 1024 * 8;
break;
case 2:
memlen = 1024 * 4;
break;
default:
memlen = 1024 * 2;
break;
}
}
break;
case NV_ARCH_04:
if (chip->PFB[0x00000000/4] & 0x00000100) {
memlen = ((chip->PFB[0x00000000/4] >> 12) & 0x0F) *
1024 * 2 + 1024 * 2;
} else {
switch (chip->PFB[0x00000000/4] & 0x00000003) {
case 0:
memlen = 1024 * 32;
break;
case 1:
memlen = 1024 * 4;
break;
case 2:
memlen = 1024 * 8;
break;
case 3:
default:
memlen = 1024 * 16;
break;
}
}
break;
case NV_ARCH_10:
case NV_ARCH_20:
if(chipset == NV_CHIP_IGEFORCE2) {
dev = pci_find_slot(0, 1);
pci_read_config_dword(dev, 0x7C, &amt);
memlen = (((amt >> 6) & 31) + 1) * 1024;
} else if (chipset == NV_CHIP_0x01F0) {
dev = pci_find_slot(0, 1);
pci_read_config_dword(dev, 0x84, &amt);
memlen = (((amt >> 4) & 127) + 1) * 1024;
} else {
switch ((chip->PFB[0x0000020C/4] >> 20) & 0x000000FF){
case 0x02:
memlen = 1024 * 2;
break;
case 0x04:
memlen = 1024 * 4;
break;
case 0x08:
memlen = 1024 * 8;
break;
case 0x10:
memlen = 1024 * 16;
break;
case 0x20:
memlen = 1024 * 32;
break;
case 0x40:
memlen = 1024 * 64;
break;
case 0x80:
memlen = 1024 * 128;
break;
default:
memlen = 1024 * 16;
break;
}
}
break;
}
return memlen;
}
unsigned long riva_get_maxdclk(struct riva_par *par)
{
RIVA_HW_INST *chip = &par->riva;
unsigned long dclk = 0;
switch (chip->Architecture) {
case NV_ARCH_03:
if (chip->PFB[0x00000000/4] & 0x00000020) {
if (((chip->PMC[0x00000000/4] & 0xF0) == 0x20)
&& ((chip->PMC[0x00000000/4] & 0x0F) >= 0x02)) {
/*
* SDRAM 128 ZX.
*/
dclk = 800000;
} else {
dclk = 1000000;
}
} else {
/*
* SGRAM 128.
*/
dclk = 1000000;
}
break;
case NV_ARCH_04:
case NV_ARCH_10:
case NV_ARCH_20:
switch ((chip->PFB[0x00000000/4] >> 3) & 0x00000003) {
case 3:
dclk = 800000;
break;
default:
dclk = 1000000;
break;
}
break;
}
return dclk;
}
void
riva_common_setup(struct riva_par *par)
{
......@@ -201,8 +355,6 @@ riva_common_setup(struct riva_par *par)
par->riva.PDIO = par->riva.PDIO0;
}
RivaGetConfig(&par->riva, par->Chipset);
if (par->FlatPanel == -1) {
/* Fix me, need x86 DDC code */
par->FlatPanel = 0;
......
......@@ -55,5 +55,7 @@ struct riva_par {
};
void riva_common_setup(struct riva_par *);
unsigned long riva_get_memlen(struct riva_par *);
unsigned long riva_get_maxdclk(struct riva_par *);
#endif /* __RIVAFB_H */
......@@ -13,14 +13,7 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <asm/uaccess.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/ioport.h>
......@@ -29,7 +22,7 @@
#define INCLUDE_TIMING_TABLE_DATA
#define DBE_REG_BASE default_par.regs
#include <asm/sgi-vwdbe.h>
#include <video/sgivw.h>
struct sgivw_par {
struct asregs *regs;
......@@ -37,6 +30,8 @@ struct sgivw_par {
u_long timing_num;
};
#define FLATPANEL_SGI_1600SW 5
/*
* RAM we reserve for the frame buffer. This defines the maximum screen
* size
......@@ -54,26 +49,29 @@ static struct fb_info fb_info;
static int ypan = 0;
static int ywrap = 0;
static int flatpanel_id = -1;
static struct fb_fix_screeninfo sgivwfb_fix __initdata = {
.id = "SGI Vis WS FB",
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_PSEUDOCOLOR,
.mmio_start = DBE_REG_PHYS,
.mmio_len = DBE_REG_SIZE,
.accel = FB_ACCEL_NONE
.accel = FB_ACCEL_NONE,
.line_length = 640,
};
static struct fb_var_screeninfo sgivwfb_var __initdata = {
/* 640x480, 8 bpp */
.xres = 640,
/* 640x480, 8 bpp */
.xres = 640,
.yres = 480,
.xres_virtual = 640,
.yres_virtual = 480,
.bits_per_pixel = 8,
.red = {0, 8, 0},
.green = {0, 8, 0},
.blue = {0, 8, 0},
.height = -1,
.red = { 0, 8, 0 },
.green = { 0, 8, 0 },
.blue = { 0, 8, 0 },
.height = -1,
.width = -1,
.pixclock = 20000,
.left_margin = 64,
......@@ -82,14 +80,35 @@ static struct fb_var_screeninfo sgivwfb_var __initdata = {
.lower_margin = 32,
.hsync_len = 64,
.vsync_len = 2,
.vmode = FB_VMODE_NONINTERLACED
.vmode = FB_VMODE_NONINTERLACED
};
static struct fb_var_screeninfo sgivwfb_var1600sw __initdata = {
/* 1600x1024, 8 bpp */
.xres = 1600,
.yres = 1024,
.xres_virtual = 1600,
.yres_virtual = 1024,
.bits_per_pixel = 8,
.red = { 0, 8, 0 },
.green = { 0, 8, 0 },
.blue = { 0, 8, 0 },
.height = -1,
.width = -1,
.pixclock = 9353,
.left_margin = 20,
.right_margin = 30,
.upper_margin = 37,
.lower_margin = 3,
.hsync_len = 20,
.vsync_len = 3,
.vmode = FB_VMODE_NONINTERLACED
};
/*
* Interface used by the world
*/
int sgivwfb_init(void);
int sgivwfb_setup(char *);
static int sgivwfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
static int sgivwfb_set_par(struct fb_info *info);
......@@ -114,34 +133,24 @@ static struct fb_ops sgivwfb_ops = {
/*
* Internal routines
*/
static u_long get_line_length(int xres_virtual, int bpp);
static unsigned long bytes_per_pixel(int bpp);
static unsigned long get_line_length(int xres_virtual, int bpp)
{
return (xres_virtual * bytes_per_pixel(bpp));
}
static unsigned long bytes_per_pixel(int bpp)
{
unsigned long length;
switch (bpp) {
case 8:
length = 1;
break;
case 16:
length = 2;
break;
case 32:
length = 4;
break;
default:
printk(KERN_INFO "sgivwfb: unsupported bpp=%d\n", bpp);
length = 0;
break;
case 8:
return 1;
case 16:
return 2;
case 32:
return 4;
default:
printk(KERN_INFO "sgivwfb: unsupported bpp %d\n", bpp);
return 0;
}
return (length);
}
static unsigned long get_line_length(int xres_virtual, int bpp)
{
return (xres_virtual * bytes_per_pixel(bpp));
}
/*
......@@ -280,8 +289,7 @@ static int sgivwfb_check_var(struct fb_var_screeninfo *var,
test_mode--;
min_mode = test_mode;
timing = &dbeVTimings[min_mode];
printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n",
timing->cfreq);
printk(KERN_INFO "sgivwfb: granted dot-clock=%d KHz\n", timing->cfreq);
/* Adjust virtual resolution, if necessary */
if (var->xres > var->xres_virtual || (!ywrap && !ypan))
......@@ -292,11 +300,12 @@ static int sgivwfb_check_var(struct fb_var_screeninfo *var,
/*
* Memory limit
*/
line_length =
get_line_length(var->xres_virtual, var->bits_per_pixel);
line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
if (line_length * var->yres_virtual > sgivwfb_mem_size)
return -ENOMEM; /* Virtual resolution to high */
info->fix.line_length = line_length;
switch (var->bits_per_pixel) {
case 8:
var->red.offset = 0;
......@@ -354,6 +363,48 @@ static int sgivwfb_check_var(struct fb_var_screeninfo *var,
return 0;
}
/*
* Setup flatpanel related registers.
*/
static void sgivwfb_setup_flatpanel(struct dbe_timing_info *currentTiming)
{
int fp_wid, fp_hgt, fp_vbs, fp_vbe;
u32 outputVal = 0;
SET_DBE_FIELD(VT_FLAGS, HDRV_INVERT, outputVal,
(currentTiming->flags & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1);
SET_DBE_FIELD(VT_FLAGS, VDRV_INVERT, outputVal,
(currentTiming->flags & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1);
DBE_SETREG(vt_flags, outputVal);
/* Turn on the flat panel */
switch (flatpanel_id) {
case FLATPANEL_SGI_1600SW:
fp_wid = 1600;
fp_hgt = 1024;
fp_vbs = 0;
fp_vbe = 1600;
currentTiming->pll_m = 4;
currentTiming->pll_n = 1;
currentTiming->pll_p = 0;
break;
default:
fp_wid = fp_hgt = fp_vbs = fp_vbe = 0xfff;
}
outputVal = 0;
SET_DBE_FIELD(FP_DE, FP_DE_ON, outputVal, fp_vbs);
SET_DBE_FIELD(FP_DE, FP_DE_OFF, outputVal, fp_vbe);
DBE_SETREG(fp_de, outputVal);
outputVal = 0;
SET_DBE_FIELD(FP_HDRV, FP_HDRV_OFF, outputVal, fp_wid);
DBE_SETREG(fp_hdrv, outputVal);
outputVal = 0;
SET_DBE_FIELD(FP_VDRV, FP_VDRV_ON, outputVal, 1);
SET_DBE_FIELD(FP_VDRV, FP_VDRV_OFF, outputVal, fp_hgt + 1);
DBE_SETREG(fp_vdrv, outputVal);
}
/*
* Set the hardware according to 'par'.
*/
......@@ -364,7 +415,7 @@ static int sgivwfb_set_par(struct fb_info *info)
u32 readVal, outputVal;
int wholeTilesX, maxPixelsPerTileX;
int frmWrite1, frmWrite2, frmWrite3b;
struct dbe_timing_info_t *currentTiming; /* Current Video Timing */
struct dbe_timing_info *currentTiming; /* Current Video Timing */
int xpmax, ypmax; // Monitor resolution
int bytesPerPixel; // Bytes per pixel
......@@ -514,6 +565,9 @@ static int sgivwfb_set_par(struct fb_info *info)
currentTiming->hblank_end - 3);
DBE_SETREG(vt_hcmap, outputVal);
if (flatpanel_id != -1)
sgivwfb_setup_flatpanel(currentTiming);
outputVal = 0;
temp = currentTiming->vblank_start - currentTiming->vblank_end - 1;
if (temp > 0)
......@@ -680,14 +734,16 @@ int __init sgivwfb_setup(char *options)
{
char *this_opt;
fb_info.fontname[0] = '\0';
if (!options || !*options)
return 0;
while ((this_opt = strsep(&options, ",")) != NULL) {
if (!strncmp(this_opt, "font:", 5))
strcpy(fb_info.fontname, this_opt + 5);
if (!strncmp(this_opt, "monitor:", 8)) {
if (!strncmp(this_opt + 8, "crt", 3))
flatpanel_id = -1;
else if (!strncmp(this_opt + 8, "1600sw", 6))
flatpanel_id = FLATPANEL_SGI_1600SW;
}
}
return 0;
}
......@@ -697,12 +753,11 @@ int __init sgivwfb_setup(char *options)
*/
int __init sgivwfb_init(void)
{
printk(KERN_INFO "sgivwfb: framebuffer at 0x%lx, size %ldk\n",
sgivwfb_mem_phys, sgivwfb_mem_size / 1024);
char *monitor;
if (!request_mem_region(DBE_REG_PHYS, DBE_REG_SIZE, "sgivwfb")) {
printk(KERN_ERR "sgivwfb: couldn't reserve mmio region\n");
goto fail_request_mem_region;
return -EBUSY;
}
default_par.regs = (struct asregs *) ioremap_nocache(DBE_REG_PHYS, DBE_REG_SIZE);
if (!default_par.regs) {
......@@ -710,10 +765,7 @@ int __init sgivwfb_init(void)
goto fail_ioremap_regs;
}
#ifdef CONFIG_MTRR
mtrr_add((unsigned long) sgivwfb_mem_phys, sgivwfb_mem_size,
MTRR_TYPE_WRCOMB, 1);
#endif
mtrr_add(sgivwfb_mem_phys, sgivwfb_mem_size, MTRR_TYPE_WRCOMB, 1);
sgivwfb_fix.smem_start = sgivwfb_mem_phys;
sgivwfb_fix.smem_len = sgivwfb_mem_size;
......@@ -722,13 +774,24 @@ int __init sgivwfb_init(void)
fb_info.node = NODEV;
fb_info.fix = sgivwfb_fix;
fb_info.var = sgivwfb_var;
switch (flatpanel_id) {
case FLATPANEL_SGI_1600SW:
fb_info.var = sgivwfb_var1600sw;
monitor = "SGI 1600SW flatpanel";
break;
default:
fb_info.var = sgivwfb_var;
monitor = "CRT";
}
printk(KERN_INFO "sgivwfb: %s monitor selected\n", monitor);
fb_info.fbops = &sgivwfb_ops;
fb_info.pseudo_palette = pseudo_palette;
fb_info.par = &default_par;
fb_info.flags = FBINFO_FLAG_DEFAULT;
fb_info.screen_base =
fb_info.screen_base = ioremap_nocache((unsigned long) sgivwfb_mem_phys, sgivwfb_mem_size);
if (!fb_info.screen_base) {
printk(KERN_ERR "sgivwfb: couldn't ioremap screen_base\n");
......@@ -742,14 +805,16 @@ int __init sgivwfb_init(void)
goto fail_register_framebuffer;
}
printk(KERN_INFO "fb%d: SGI BDE frame buffer device, using %ldK of video memory\n", minor(fb_info.node, sgivwfb_mem_size >> 10);
printk(KERN_INFO "fb%d: SGI DBE frame buffer device, using %ldK of video memory at %#lx\n",
minor(fb_info.node), sgivwfb_mem_size >> 10, sgivwfb_mem_phys);
return 0;
fail_register_framebuffer:
fail_register_framebuffer:
iounmap((char *) fb_info.screen_base);
fail_ioremap_fbmem:
fail_ioremap_fbmem:
iounmap(default_par.regs);
fail_ioremap_regs:
fail_ioremap_regs:
release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
return -ENXIO;
}
......@@ -767,6 +832,7 @@ void cleanup_module(void)
dbe_TurnOffDma();
iounmap(regs);
iounmap(&fb_info.screen_base);
release_mem_region(DBE_REG_PHYS, DBE_REG_SIZE);
}
#endif /* MODULE */
......@@ -939,7 +939,7 @@ static void tdfxfb_imageblit(struct fb_info *info, struct fb_image *pixmap)
u8 *chardata = (u8 *) pixmap->data;
u32 srcfmt;
if (pixmap->depth != 1) {
if (pixmap->depth != 0) {
//banshee_make_room(par, 6 + ((size + 3) >> 2));
//srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
cfb_imageblit(info, pixmap);
......
......@@ -585,7 +585,7 @@ tgafb_imageblit(struct fb_info *info, struct fb_image *image)
can do better than the generic code. */
/* ??? There is a DMA write mode; I wonder if that could be
made to pull the data from the image buffer... */
if (image->depth > 1) {
if (image->depth > 0) {
cfb_imageblit(info, image);
return;
}
......
......@@ -305,7 +305,8 @@ static int vga16fb_open(struct fb_info *info, int user)
if (!cnt) {
memset(&par->state, 0, sizeof(struct vgastate));
par->state.flags = 8;
par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE |
VGA_SAVE_CMAP;
save_vga(&par->state);
}
atomic_inc(&par->ref_count);
......@@ -1164,14 +1165,14 @@ static unsigned int transl_l[] =
#endif
#endif
void vga_8planes_imageblit(struct fb_info *info, const struct fb_image *image)
void vga_8planes_imageblit(struct fb_info *info, struct fb_image *image)
{
char oldindex = getindex();
char oldmode = setmode(0x40);
char oldop = setop(0);
char oldsr = setsr(0);
char oldmask = selectmask();
u8 *cdat = image->data;
const char *cdat = image->data;
u32 dx = image->dx;
char *where;
int y;
......@@ -1195,12 +1196,12 @@ void vga_8planes_imageblit(struct fb_info *info, const struct fb_image *image)
setindex(oldindex);
}
void vga_imageblit_expand(struct fb_info *info, const struct fb_image *image)
void vga_imageblit_expand(struct fb_info *info, struct fb_image *image)
{
char *where = info->screen_base + (image->dx/8) +
image->dy * info->fix.line_length;
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
u8 *cdat = image->data, *dst;
char *cdat = (char *) image->data, *dst;
int x, y;
switch (info->fix.type) {
......@@ -1258,7 +1259,7 @@ void vga_imageblit_expand(struct fb_info *info, const struct fb_image *image)
}
}
void vga_imageblit_color(struct fb_info *info, const struct fb_image *image)
void vga_imageblit_color(struct fb_info *info, struct fb_image *image)
{
/*
* Draw logo
......@@ -1266,7 +1267,7 @@ void vga_imageblit_color(struct fb_info *info, const struct fb_image *image)
struct vga16fb_par *par = (struct vga16fb_par *) info->par;
char *where = info->screen_base + image->dy * info->fix.line_length +
image->dx/8;
char *cdat = image->data, *dst;
const char *cdat = image->data, *dst;
int x, y;
switch (info->fix.type) {
......@@ -1301,12 +1302,14 @@ void vga_imageblit_color(struct fb_info *info, const struct fb_image *image)
}
}
void vga16fb_imageblit(struct fb_info *info, const struct fb_image *image)
void vga16fb_imageblit(struct fb_info *info, const struct fb_image *img)
{
if (image->depth == 1)
vga_imageblit_expand(info, image);
else if (image->depth == info->var.bits_per_pixel)
vga_imageblit_color(info, image);
struct fb_image image = *img;
if (image.depth == 0)
vga_imageblit_expand(info, &image);
else if (image.depth == info->var.bits_per_pixel)
vga_imageblit_color(info, &image);
}
static struct fb_ops vga16fb_ops = {
......
......@@ -462,6 +462,7 @@ extern void cfb_imageblit(struct fb_info *info, const struct fb_image *image);
/* drivers/video/fbmem.c */
extern int register_framebuffer(struct fb_info *fb_info);
extern int unregister_framebuffer(struct fb_info *fb_info);
extern int fb_prepare_logo(struct fb_info *fb_info);
extern int fb_show_logo(struct fb_info *fb_info);
extern struct fb_info *registered_fb[FB_MAX];
extern int num_registered_fb;
......
/*
* linux/drivers/video/sgivwfb.h -- SGI DBE frame buffer device header
* linux/drivers/video/sgivw.h -- SGI DBE frame buffer device header
*
* Copyright (C) 1999 Silicon Graphics, Inc.
* Jeffrey Newquist, newquist@engr.sgi.som
......@@ -12,10 +12,10 @@
#ifndef __SGIVWFB_H__
#define __SGIVWFB_H__
#define DBE_GETREG(reg, dest) ((dest) = DBE_REG_BASE->##reg)
#define DBE_SETREG(reg, src) DBE_REG_BASE->##reg = (src)
#define DBE_IGETREG(reg, idx, dest) ((dest) = DBE_REG_BASE->##reg##[idx])
#define DBE_ISETREG(reg, idx, src) (DBE_REG_BASE->##reg##[idx] = (src))
#define DBE_GETREG(reg, dest) ((dest) = DBE_REG_BASE->reg)
#define DBE_SETREG(reg, src) DBE_REG_BASE->reg = (src)
#define DBE_IGETREG(reg, idx, dest) ((dest) = DBE_REG_BASE->reg[idx])
#define DBE_ISETREG(reg, idx, src) (DBE_REG_BASE->reg[idx] = (src))
#define MASK(msb, lsb) ( (((u32)1<<((msb)-(lsb)+1))-1) << (lsb) )
#define GET(v, msb, lsb) ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) )
......@@ -29,7 +29,7 @@
#define DBE_REG_PHYS 0xd0000000
#define DBE_REG_SIZE 0x01000000
typedef struct {
struct asregs {
volatile u32 ctrlstat; /* 0x000000 general control */
volatile u32 dotclock; /* 0x000004 dot clock PLL control */
volatile u32 i2c; /* 0x000008 crt I2C control */
......@@ -121,7 +121,7 @@ typedef struct {
volatile u32 vc_6; /* 0x080018 video capture crtl 3 */
volatile u32 vc_7; /* 0x08001c video capture crtl 3 */
volatile u32 vc_8; /* 0x08000c video capture crtl 3 */
} asregs;
};
/* Bit mask information */
......@@ -144,6 +144,21 @@ typedef struct {
#define DBE_VT_XY_VT_FREEZE_MSB 31
#define DBE_VT_XY_VT_FREEZE_LSB 31
#define DBE_FP_VDRV_FP_VDRV_ON_MSB 23
#define DBE_FP_VDRV_FP_VDRV_ON_LSB 12
#define DBE_FP_VDRV_FP_VDRV_OFF_MSB 11
#define DBE_FP_VDRV_FP_VDRV_OFF_LSB 0
#define DBE_FP_HDRV_FP_HDRV_ON_MSB 23
#define DBE_FP_HDRV_FP_HDRV_ON_LSB 12
#define DBE_FP_HDRV_FP_HDRV_OFF_MSB 11
#define DBE_FP_HDRV_FP_HDRV_OFF_LSB 0
#define DBE_FP_DE_FP_DE_ON_MSB 23
#define DBE_FP_DE_FP_DE_ON_LSB 12
#define DBE_FP_DE_FP_DE_OFF_MSB 11
#define DBE_FP_DE_FP_DE_OFF_LSB 0
#define DBE_VT_VSYNC_VT_VSYNC_ON_MSB 23
#define DBE_VT_VSYNC_VT_VSYNC_ON_LSB 12
#define DBE_VT_VSYNC_VT_VSYNC_OFF_MSB 11
......@@ -164,6 +179,11 @@ typedef struct {
#define DBE_VT_HBLANK_VT_HBLANK_OFF_MSB 11
#define DBE_VT_HBLANK_VT_HBLANK_OFF_LSB 0
#define DBE_VT_FLAGS_VDRV_INVERT_MSB 0
#define DBE_VT_FLAGS_VDRV_INVERT_LSB 0
#define DBE_VT_FLAGS_HDRV_INVERT_MSB 2
#define DBE_VT_FLAGS_HDRV_INVERT_LSB 2
#define DBE_VT_VCMAP_VT_VCMAP_ON_MSB 23
#define DBE_VT_VCMAP_VT_VCMAP_ON_LSB 12
#define DBE_VT_VCMAP_VT_VCMAP_OFF_MSB 11
......@@ -264,6 +284,8 @@ typedef struct {
#define DBE_CRS_MAGIC 54
#define DBE_CLOCK_REF_KHZ 27000
/* Config Register (DBE Only) Definitions */
#define DBE_CONFIG_VDAC_ENABLE 0x00000001
......@@ -326,7 +348,7 @@ typedef enum {
* Crime Video Timing Data Structure
*/
typedef struct dbe_timing_info
struct dbe_timing_info
{
dbe_timing_t type;
int flags;
......@@ -347,7 +369,7 @@ typedef struct dbe_timing_info
short pll_m; /* PLL M parameter */
short pll_n; /* PLL P parameter */
short pll_p; /* PLL N parameter */
} dbe_timing_info_t;
};
/* Defines for dbe_vof_info_t flags */
......
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