Commit 0db2a8cd authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu/psp: update the naming of GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL

GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL was renamed to GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_CNTL
in latest psp_gfx_if drop
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0855c9c9
...@@ -191,7 +191,7 @@ enum psp_gfx_fw_type ...@@ -191,7 +191,7 @@ enum psp_gfx_fw_type
GFX_FW_TYPE_MMSCH = 19, GFX_FW_TYPE_MMSCH = 19,
GFX_FW_TYPE_RLC_RESTORE_LIST_GPM_MEM = 20, GFX_FW_TYPE_RLC_RESTORE_LIST_GPM_MEM = 20,
GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_MEM = 21, GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_MEM = 21,
GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL = 22, GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_CNTL = 22,
GFX_FW_TYPE_UVD1 = 23, GFX_FW_TYPE_UVD1 = 23,
GFX_FW_TYPE_MAX = 24 GFX_FW_TYPE_MAX = 24
}; };
......
...@@ -73,7 +73,7 @@ psp_v10_0_get_fw_type(struct amdgpu_firmware_info *ucode, enum psp_gfx_fw_type * ...@@ -73,7 +73,7 @@ psp_v10_0_get_fw_type(struct amdgpu_firmware_info *ucode, enum psp_gfx_fw_type *
*type = GFX_FW_TYPE_RLC_G; *type = GFX_FW_TYPE_RLC_G;
break; break;
case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL: case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL:
*type = GFX_FW_TYPE_RLC_RESTORE_LIST_CNTL; *type = GFX_FW_TYPE_RLC_RESTORE_LIST_SRM_CNTL;
break; break;
case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM: case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM:
*type = GFX_FW_TYPE_RLC_RESTORE_LIST_GPM_MEM; *type = GFX_FW_TYPE_RLC_RESTORE_LIST_GPM_MEM;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment