Commit 0edda1d6 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Flush the CSB pointer reset

The HW resets it CSB tail pointer on resetting the engine. Most of the
time. In case it doesn't (and for system resume) we write the expected
value anyway. For extra paranoia, flush the write before we invalidate
the cacheline.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190412110159.10495-1-chris@chris-wilson.co.uk
parent fa9d38f6
...@@ -1866,6 +1866,7 @@ static void reset_csb_pointers(struct intel_engine_execlists *execlists) ...@@ -1866,6 +1866,7 @@ static void reset_csb_pointers(struct intel_engine_execlists *execlists)
*/ */
execlists->csb_head = reset_value; execlists->csb_head = reset_value;
WRITE_ONCE(*execlists->csb_write, reset_value); WRITE_ONCE(*execlists->csb_write, reset_value);
wmb(); /* Make sure this is visible to HW (paranoia?) */
invalidate_csb_entries(&execlists->csb_status[0], invalidate_csb_entries(&execlists->csb_status[0],
&execlists->csb_status[reset_value]); &execlists->csb_status[reset_value]);
......
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