Commit 0fbf6104 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Andy Gross

ARM: dts: apq8064: remove redundant i2c pinctrl properties

This patch removes i2c pinctrl properties from board which which are now
mentioned in the SOC specific file. This will avoid redundant properties
across multiple board fiiles.
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarAndy Gross <agross@codeaurora.org>
parent 9afbb3ba
......@@ -13,15 +13,6 @@ chosen {
};
soc {
pinctrl@800000 {
i2c1_pins: i2c1 {
mux {
pins = "gpio20", "gpio21";
function = "gsbi1";
};
};
};
rpm@108000 {
regulators {
vin_lvs1_3_6-supply = <&pm8921_s4>;
......@@ -96,8 +87,6 @@ gsbi@12440000 {
i2c@12460000 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
eeprom: eeprom@50 {
compatible = "24c02";
......
......@@ -119,8 +119,6 @@ gsbi3: gsbi@16200000 {
qcom,mode = <GSBI_PROT_I2C>;
i2c3: i2c@16280000 {
status = "okay";
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
};
};
......@@ -131,8 +129,6 @@ gsbi@12440000 {
i2c@12460000 {
status = "okay";
clock-frequency = <200000>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
eeprom: eeprom@52 {
compatible = "atmel,24c128";
......@@ -148,7 +144,6 @@ gsbi@16500000 {
serial@16540000 {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&uart_pins>;
};
......
......@@ -213,6 +213,8 @@ gsbi1: gsbi@12440000 {
i2c1: i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
reg = <0x12460000 0x1000>;
interrupts = <0 194 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
......@@ -258,6 +260,8 @@ gsbi3: gsbi@16200000 {
ranges;
i2c3: i2c@16280000 {
compatible = "qcom,i2c-qup-v1.1.1";
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
reg = <0x16280000 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
clocks = <&gcc GSBI3_QUP_CLK>,
......
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