Commit 106d4087 authored by John Levon's avatar John Levon Committed by Linus Torvalds

[PATCH] fix oprofile on x86 > 1 counter

Without this we have a choice between dropping lots of counter events
for counters > 0, or getting dazed and confused.  This brings it inline
with the 2.4 module code.  Tested on my 2-way.

Also fix a typo from Steven Cole, and remove some unnecessary code
parent 106e95f1
...@@ -34,7 +34,7 @@ ev4_reg_setup(struct op_register_config *reg, ...@@ -34,7 +34,7 @@ ev4_reg_setup(struct op_register_config *reg,
for these "disabled" counter overflows are ignored by the for these "disabled" counter overflows are ignored by the
interrupt handler. interrupt handler.
This is most irritating, becuase the hardware *can* enable and This is most irritating, because the hardware *can* enable and
disable the interrupts for these counters independently, but the disable the interrupts for these counters independently, but the
wrperfmon interface doesn't allow it. */ wrperfmon interface doesn't allow it. */
......
...@@ -104,10 +104,11 @@ static int athlon_check_ctrs(unsigned int const cpu, ...@@ -104,10 +104,11 @@ static int athlon_check_ctrs(unsigned int const cpu,
if (CTR_OVERFLOWED(low)) { if (CTR_OVERFLOWED(low)) {
oprofile_add_sample(eip, is_kernel, i, cpu); oprofile_add_sample(eip, is_kernel, i, cpu);
CTR_WRITE(reset_value[i], msrs, i); CTR_WRITE(reset_value[i], msrs, i);
return 1;
} }
} }
return 0;
/* See op_model_ppro.c */
return 1;
} }
......
...@@ -608,13 +608,14 @@ static int p4_check_ctrs(unsigned int const cpu, ...@@ -608,13 +608,14 @@ static int p4_check_ctrs(unsigned int const cpu,
CTR_WRITE(reset_value[i], real); CTR_WRITE(reset_value[i], real);
/* P4 quirk: you have to re-unmask the apic vector */ /* P4 quirk: you have to re-unmask the apic vector */
apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
return 1;
} }
} }
/* P4 quirk: you have to re-unmask the apic vector */ /* P4 quirk: you have to re-unmask the apic vector */
apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
return 0;
/* See op_model_ppro.c */
return 1;
} }
......
...@@ -98,10 +98,17 @@ static int ppro_check_ctrs(unsigned int const cpu, ...@@ -98,10 +98,17 @@ static int ppro_check_ctrs(unsigned int const cpu,
if (CTR_OVERFLOWED(low)) { if (CTR_OVERFLOWED(low)) {
oprofile_add_sample(eip, is_kernel, i, cpu); oprofile_add_sample(eip, is_kernel, i, cpu);
CTR_WRITE(reset_value[i], msrs, i); CTR_WRITE(reset_value[i], msrs, i);
return 1;
} }
} }
return 0;
/* We can't work out if we really handled an interrupt. We
* might have caught a *second* counter just after overflowing
* the interrupt for this counter then arrives
* and we don't find a counter that's overflowed, so we
* would return 0 and get dazed + confused. Instead we always
* assume we found an overflow. This sucks.
*/
return 1;
} }
......
...@@ -85,9 +85,6 @@ static unsigned long nr_available_slots(struct oprofile_cpu_buffer const * b) ...@@ -85,9 +85,6 @@ static unsigned long nr_available_slots(struct oprofile_cpu_buffer const * b)
unsigned long head = b->head_pos; unsigned long head = b->head_pos;
unsigned long tail = b->tail_pos; unsigned long tail = b->tail_pos;
if (tail == head)
return b->buffer_size;
if (tail > head) if (tail > head)
return tail - head; return tail - head;
......
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