Commit 112c60b3 authored by Rakesh Ughreja's avatar Rakesh Ughreja Committed by Mark Brown

ASoC: Intel: Skylake: Reset stream to link mapping

By default all the streams are mapped to all links after controller is
reset which causes stream to be broadcast on all the links.

This patch resets the stream-link mapping after controller reset. The
stream is mapped later to the appropriate link as part of stream setup.
Tested-by: default avatarAbhijeet Kumar <abhijeet.kumar@intel.com>
Signed-off-by: default avatarRakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: default avatarSanyog Kale <sanyog.r.kale@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 74e65192
......@@ -127,10 +127,17 @@ static void skl_clock_power_gating(struct device *dev, bool enable)
*/
static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
{
struct hdac_ext_bus *ebus = hbus_to_ebus(bus);
struct hdac_ext_link *hlink;
int ret;
skl_enable_miscbdcge(bus->dev, false);
ret = snd_hdac_bus_init_chip(bus, full_reset);
/* Reset stream-to-link mapping */
list_for_each_entry(hlink, &ebus->hlink_list, list)
bus->io_ops->reg_writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
skl_enable_miscbdcge(bus->dev, true);
return ret;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment