Commit 12e5bde1 authored by Slark Xiao's avatar Slark Xiao Committed by Rob Herring

dt-bindings: Fix typo in comment

Fix typo in the comment
Signed-off-by: default avatarSlark Xiao <slark_xiao@163.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220721011746.19663-1-slark_xiao@163.com
parent fce43d8f
......@@ -10,7 +10,7 @@ system, notifying them when a low power state is entered or exited.
Multiple revisions of the SAW hardware are supported using these Device Nodes.
SAW2 revisions differ in the register offset and configuration data. Also, the
same revision of the SAW in different SoCs may have different configuration
data due the the differences in hardware capabilities. Hence the SoC name, the
data due the differences in hardware capabilities. Hence the SoC name, the
version of the SAW hardware in that SoC and the distinction between cpu (big
or Little) or cache, may be needed to uniquely identify the SAW register
configuration and initialization data. The compatible string is used to
......
......@@ -15,7 +15,7 @@ Required properties:
- for "ti,da850-pll1", shall be "clksrc"
Optional properties:
- ti,clkmode-square-wave: Indicates that the the board is supplying a square
- ti,clkmode-square-wave: Indicates that the board is supplying a square
wave input on the OSCIN pin instead of using a crystal oscillator.
This property is only valid when compatible = "ti,da850-pll0".
......
......@@ -330,7 +330,7 @@ succeeded.
The Device Tree Overlay will contain:
* "target-path" or "target"
The insertion point where the the contents of the overlay will go into the
The insertion point where the contents of the overlay will go into the
live tree. target-path is a full path, while target is a phandle.
* "ranges"
The address space mapping from processor to FPGA bus(ses).
......
......@@ -14,7 +14,7 @@ Optional properties:
- ngpios : Number of used GPIO lines (0..n-1), default is 8.
- load-gpios : GPIO pin specifier attached to load enable, this
pin is pulsed before reading from the device to
load input pin values into the the device.
load input pin values into the device.
For other required and optional properties of SPI slave
nodes please refer to ../spi/spi-bus.txt.
......
......@@ -14,7 +14,7 @@ MAC node:
- mac-address : The 6-byte MAC address. If present, it is the default
MAC address.
- internal-phy : phandle to the internal PHY node
- phy-handle : phandle the the external PHY node
- phy-handle : phandle the external PHY node
Internal PHY node:
- compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
......
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be the following:
"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be one of the following:
"aspeed,ast2400-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -17,7 +17,7 @@ description: |+
"aspeed,ast2500-scu", "syscon", "simple-mfd"
"aspeed,g5-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be one of the following:
"aspeed,ast2600-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -17,7 +17,7 @@ description: |+
- compatible: Should be the following:
"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -5,7 +5,7 @@ Copyright 2013 Freescale Semiconductor Inc.
Power Architecture CPUs in Freescale SOCs are represented in device trees as
per the definition in the Devicetree Specification.
In addition to the the Devicetree Specification definitions, the properties
In addition to the Devicetree Specification definitions, the properties
defined below may be present on CPU nodes.
PROPERTIES
......
......@@ -39,7 +39,7 @@ otherwise. The length of all the property arrays must be the same.
- ibm,cpu-idle-state-flags:
Array of unsigned 32-bit values containing the values of the
flags associated with the the aforementioned idle-states. The
flags associated with the aforementioned idle-states. The
flag bits are as follows:
0x00000001 /* Decrementer would stop */
0x00000002 /* Needs timebase restore */
......
......@@ -37,7 +37,7 @@ on the Qualcomm Hexagon core.
- interrupt-names:
Usage: required
Value type: <stringlist>
Definition: The interrupts needed depends on the the compatible
Definition: The interrupts needed depends on the compatible
string:
qcom,q6v5-pil:
qcom,ipq8074-wcss-pil:
......
......@@ -68,9 +68,9 @@ properties:
array is defined as <PDMIN1 PDMIN2 PDMIN3 PDMIN4>.
0 - (default) Odd channel is latched on the negative edge and even
channel is latched on the the positive edge.
channel is latched on the positive edge.
1 - Odd channel is latched on the positive edge and even channel is
latched on the the negative edge.
latched on the negative edge.
PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data
PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data
......
......@@ -16,7 +16,7 @@ description: |+
- compatible: Should be one of the following:
"brcm,bcm2711-avs-monitor", "syscon", "simple-mfd"
Refer to the the bindings described in
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
properties:
......
......@@ -96,7 +96,7 @@ critical trip point is reported back to the thermal framework to implement
software shutdown.
- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
temperature. Once the the temperature of this thermal zone is higher
temperature. Once the temperature of this thermal zone is higher
than it, it will trigger the HW throttle event.
Example :
......
......@@ -42,7 +42,7 @@ properties:
description:
Address ranges of the thermal registers. If more then one range is given
the first one must be the common registers followed by each sensor
according the the datasheet.
according the datasheet.
minItems: 1
maxItems: 4
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment