Commit 13a3398b authored by Matt Roper's avatar Matt Roper Committed by Rodrigo Vivi

drm/xe/xe2: Update render/compute context image sizes

The render and compute context are significantly smaller on Xe2 than on
previous platforms.

Registers:
 - Render:  3008 dwords -> 12032 bytes -> round to 3 pages
 - Compute: 1424 dwords ->  5696 bytes -> round to 2 pages

We also allocate one additional page for the HWSP, so the total
allocation sizes for render and compute are 4 and 3 pages respectively.

Bspec: 65182, 56578, 55793
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarMatt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 0aef9ff7
...@@ -37,9 +37,16 @@ size_t xe_lrc_size(struct xe_device *xe, enum xe_engine_class class) ...@@ -37,9 +37,16 @@ size_t xe_lrc_size(struct xe_device *xe, enum xe_engine_class class)
{ {
switch (class) { switch (class) {
case XE_ENGINE_CLASS_RENDER: case XE_ENGINE_CLASS_RENDER:
if (GRAPHICS_VER(xe) >= 20)
return 4 * SZ_4K;
else
return 14 * SZ_4K;
case XE_ENGINE_CLASS_COMPUTE: case XE_ENGINE_CLASS_COMPUTE:
/* 14 pages since graphics_ver == 11 */ /* 14 pages since graphics_ver == 11 */
return 14 * SZ_4K; if (GRAPHICS_VER(xe) >= 20)
return 3 * SZ_4K;
else
return 14 * SZ_4K;
default: default:
WARN(1, "Unknown engine class: %d", class); WARN(1, "Unknown engine class: %d", class);
fallthrough; fallthrough;
......
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