Commit 14a3c4ab authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (407 commits)
  [ARM] pxafb: add support for overlay1 and overlay2 as framebuffer devices
  [ARM] pxafb: cleanup of the timing checking code
  [ARM] pxafb: cleanup of the color format manipulation code
  [ARM] pxafb: add palette format support for LCCR4_PAL_FOR_3
  [ARM] pxafb: add support for FBIOPAN_DISPLAY by dma braching
  [ARM] pxafb: allow pxafb_set_par() to start from arbitrary yoffset
  [ARM] pxafb: allow video memory size to be configurable
  [ARM] pxa: add document on the MFP design and how to use it
  [ARM] sa1100_wdt: don't assume CLOCK_TICK_RATE to be a constant
  [ARM] rtc-sa1100: don't assume CLOCK_TICK_RATE to be a constant
  [ARM] pxa/tavorevb: update board support (smartpanel LCD + keypad)
  [ARM] pxa: Update eseries defconfig
  [ARM] 5352/1: add w90p910-plat config file
  [ARM] s3c: S3C options should depend on PLAT_S3C
  [ARM] mv78xx0: implement GPIO and GPIO interrupt support
  [ARM] Kirkwood: implement GPIO and GPIO interrupt support
  [ARM] Orion: share GPIO IRQ handling code
  [ARM] Orion: share GPIO handling code
  [ARM] s3c: define __io using the typesafe version
  [ARM] S3C64XX: Ensure CPU_V6 is selected
  ...
parents 1af237a0 47992cbd
This diff is collapsed.
...@@ -5,9 +5,13 @@ The driver supports the following options, either via ...@@ -5,9 +5,13 @@ The driver supports the following options, either via
options=<OPTIONS> when modular or video=pxafb:<OPTIONS> when built in. options=<OPTIONS> when modular or video=pxafb:<OPTIONS> when built in.
For example: For example:
modprobe pxafb options=mode:640x480-8,passive modprobe pxafb options=vmem:2M,mode:640x480-8,passive
or on the kernel command line or on the kernel command line
video=pxafb:mode:640x480-8,passive video=pxafb:vmem:2M,mode:640x480-8,passive
vmem: VIDEO_MEM_SIZE
Amount of video memory to allocate (can be suffixed with K or M
for kilobytes or megabytes)
mode:XRESxYRES[-BPP] mode:XRESxYRES[-BPP]
XRES == LCCR1_PPL + 1 XRES == LCCR1_PPL + 1
...@@ -52,3 +56,87 @@ outputen:POLARITY ...@@ -52,3 +56,87 @@ outputen:POLARITY
pixclockpol:POLARITY pixclockpol:POLARITY
pixel clock polarity pixel clock polarity
0 => falling edge, 1 => rising edge 0 => falling edge, 1 => rising edge
Overlay Support for PXA27x and later LCD controllers
====================================================
PXA27x and later processors support overlay1 and overlay2 on-top of the
base framebuffer (although under-neath the base is also possible). They
support palette and no-palette RGB formats, as well as YUV formats (only
available on overlay2). These overlays have dedicated DMA channels and
behave in a similar way as a framebuffer.
However, there are some differences between these overlay framebuffers
and normal framebuffers, as listed below:
1. overlay can start at a 32-bit word aligned position within the base
framebuffer, which means they have a start (x, y). This information
is encoded into var->nonstd (no, var->xoffset and var->yoffset are
not for such purpose).
2. overlay framebuffer is allocated dynamically according to specified
'struct fb_var_screeninfo', the amount is decided by:
var->xres_virtual * var->yres_virtual * bpp
bpp = 16 -- for RGB565 or RGBT555
= 24 -- for YUV444 packed
= 24 -- for YUV444 planar
= 16 -- for YUV422 planar (1 pixel = 1 Y + 1/2 Cb + 1/2 Cr)
= 12 -- for YUV420 planar (1 pixel = 1 Y + 1/4 Cb + 1/4 Cr)
NOTE:
a. overlay does not support panning in x-direction, thus
var->xres_virtual will always be equal to var->xres
b. line length of overlay(s) must be on a 32-bit word boundary,
for YUV planar modes, it is a requirement for the component
with minimum bits per pixel, e.g. for YUV420, Cr component
for one pixel is actually 2-bits, it means the line length
should be a multiple of 16-pixels
c. starting horizontal position (XPOS) should start on a 32-bit
word boundary, otherwise the fb_check_var() will just fail.
d. the rectangle of the overlay should be within the base plane,
otherwise fail
Applications should follow the sequence below to operate an overlay
framebuffer:
a. open("/dev/fb[1-2]", ...)
b. ioctl(fd, FBIOGET_VSCREENINFO, ...)
c. modify 'var' with desired parameters:
1) var->xres and var->yres
2) larger var->yres_virtual if more memory is required,
usually for double-buffering
3) var->nonstd for starting (x, y) and color format
4) var->{red, green, blue, transp} if RGB mode is to be used
d. ioctl(fd, FBIOPUT_VSCREENINFO, ...)
e. ioctl(fd, FBIOGET_FSCREENINFO, ...)
f. mmap
g. ...
3. for YUV planar formats, these are actually not supported within the
framebuffer framework, application has to take care of the offsets
and lengths of each component within the framebuffer.
4. var->nonstd is used to pass starting (x, y) position and color format,
the detailed bit fields are shown below:
31 23 20 10 0
+-----------------+---+----------+----------+
| ... unused ... |FOR| XPOS | YPOS |
+-----------------+---+----------+----------+
FOR - color format, as defined by OVERLAY_FORMAT_* in pxafb.h
0 - RGB
1 - YUV444 PACKED
2 - YUV444 PLANAR
3 - YUV422 PLANAR
4 - YUR420 PLANAR
XPOS - starting horizontal position
YPOS - starting vertical position
...@@ -1755,6 +1755,13 @@ L: linuxppc-dev@ozlabs.org ...@@ -1755,6 +1755,13 @@ L: linuxppc-dev@ozlabs.org
L: linux-i2c@vger.kernel.org L: linux-i2c@vger.kernel.org
S: Maintained S: Maintained
FREESCALE IMX / MXC FRAMEBUFFER DRIVER
P: Sascha Hauer
M: kernel@pengutronix.de
L: linux-fbdev-devel@lists.sourceforge.net (moderated for non-subscribers)
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
FREESCALE SOC FS_ENET DRIVER FREESCALE SOC FS_ENET DRIVER
P: Pantelis Antoniou P: Pantelis Antoniou
M: pantelis.antoniou@gmail.com M: pantelis.antoniou@gmail.com
......
...@@ -156,7 +156,6 @@ config ARCH_MTD_XIP ...@@ -156,7 +156,6 @@ config ARCH_MTD_XIP
bool bool
config GENERIC_HARDIRQS_NO__DO_IRQ config GENERIC_HARDIRQS_NO__DO_IRQ
bool
def_bool y def_bool y
if OPROFILE if OPROFILE
...@@ -201,6 +200,7 @@ choice ...@@ -201,6 +200,7 @@ choice
config ARCH_AAEC2000 config ARCH_AAEC2000
bool "Agilent AAEC-2000 based" bool "Agilent AAEC-2000 based"
select CPU_ARM920T
select ARM_AMBA select ARM_AMBA
select HAVE_CLK select HAVE_CLK
help help
...@@ -210,6 +210,7 @@ config ARCH_INTEGRATOR ...@@ -210,6 +210,7 @@ config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family" bool "ARM Ltd. Integrator family"
select ARM_AMBA select ARM_AMBA
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
select ICST525 select ICST525
help help
Support for ARM's Integrator platform. Support for ARM's Integrator platform.
...@@ -218,6 +219,7 @@ config ARCH_REALVIEW ...@@ -218,6 +219,7 @@ config ARCH_REALVIEW
bool "ARM Ltd. RealView family" bool "ARM Ltd. RealView family"
select ARM_AMBA select ARM_AMBA
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
select ICST307 select ICST307
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
...@@ -229,6 +231,7 @@ config ARCH_VERSATILE ...@@ -229,6 +231,7 @@ config ARCH_VERSATILE
select ARM_AMBA select ARM_AMBA
select ARM_VIC select ARM_VIC
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
select ICST307 select ICST307
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
...@@ -243,22 +246,15 @@ config ARCH_AT91 ...@@ -243,22 +246,15 @@ config ARCH_AT91
This enables support for systems based on the Atmel AT91RM9200, This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors. AT91SAM9 and AT91CAP9 processors.
config ARCH_CLPS7500
bool "Cirrus CL-PS7500FE"
select TIMER_ACORN
select ISA
select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE
help
Support for the Cirrus Logic PS7500FE system-on-a-chip.
config ARCH_CLPS711X config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based" bool "Cirrus Logic CLPS711x/EP721x-based"
select CPU_ARM720T
help help
Support for Cirrus Logic 711x/721x based boards. Support for Cirrus Logic 711x/721x based boards.
config ARCH_EBSA110 config ARCH_EBSA110
bool "EBSA-110" bool "EBSA-110"
select CPU_SA110
select ISA select ISA
select NO_IOPORT select NO_IOPORT
help help
...@@ -269,16 +265,19 @@ config ARCH_EBSA110 ...@@ -269,16 +265,19 @@ config ARCH_EBSA110
config ARCH_EP93XX config ARCH_EP93XX
bool "EP93xx-based" bool "EP93xx-based"
select CPU_ARM920T
select ARM_AMBA select ARM_AMBA
select ARM_VIC select ARM_VIC
select GENERIC_GPIO select GENERIC_GPIO
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
help help
This enables support for the Cirrus EP93xx series of CPUs. This enables support for the Cirrus EP93xx series of CPUs.
config ARCH_FOOTBRIDGE config ARCH_FOOTBRIDGE
bool "FootBridge" bool "FootBridge"
select CPU_SA110
select FOOTBRIDGE select FOOTBRIDGE
help help
Support for systems based on the DC21285 companion chip Support for systems based on the DC21285 companion chip
...@@ -286,18 +285,23 @@ config ARCH_FOOTBRIDGE ...@@ -286,18 +285,23 @@ config ARCH_FOOTBRIDGE
config ARCH_NETX config ARCH_NETX
bool "Hilscher NetX based" bool "Hilscher NetX based"
select CPU_ARM926T
select ARM_VIC select ARM_VIC
select GENERIC_CLOCKEVENTS
select GENERIC_TIME
help help
This enables support for systems based on the Hilscher NetX Soc This enables support for systems based on the Hilscher NetX Soc
config ARCH_H720X config ARCH_H720X
bool "Hynix HMS720x-based" bool "Hynix HMS720x-based"
select CPU_ARM720T
select ISA_DMA_API select ISA_DMA_API
help help
This enables support for systems based on the Hynix HMS720x This enables support for systems based on the Hynix HMS720x
config ARCH_IMX config ARCH_IMX
bool "IMX" bool "IMX"
select CPU_ARM920T
select GENERIC_GPIO select GENERIC_GPIO
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
...@@ -307,6 +311,7 @@ config ARCH_IMX ...@@ -307,6 +311,7 @@ config ARCH_IMX
config ARCH_IOP13XX config ARCH_IOP13XX
bool "IOP13xx-based" bool "IOP13xx-based"
depends on MMU depends on MMU
select CPU_XSC3
select PLAT_IOP select PLAT_IOP
select PCI select PCI
select ARCH_SUPPORTS_MSI select ARCH_SUPPORTS_MSI
...@@ -317,6 +322,7 @@ config ARCH_IOP13XX ...@@ -317,6 +322,7 @@ config ARCH_IOP13XX
config ARCH_IOP32X config ARCH_IOP32X
bool "IOP32x-based" bool "IOP32x-based"
depends on MMU depends on MMU
select CPU_XSCALE
select PLAT_IOP select PLAT_IOP
select PCI select PCI
select GENERIC_GPIO select GENERIC_GPIO
...@@ -328,6 +334,7 @@ config ARCH_IOP32X ...@@ -328,6 +334,7 @@ config ARCH_IOP32X
config ARCH_IOP33X config ARCH_IOP33X
bool "IOP33x-based" bool "IOP33x-based"
depends on MMU depends on MMU
select CPU_XSCALE
select PLAT_IOP select PLAT_IOP
select PCI select PCI
select GENERIC_GPIO select GENERIC_GPIO
...@@ -338,6 +345,7 @@ config ARCH_IOP33X ...@@ -338,6 +345,7 @@ config ARCH_IOP33X
config ARCH_IXP23XX config ARCH_IXP23XX
bool "IXP23XX-based" bool "IXP23XX-based"
depends on MMU depends on MMU
select CPU_XSC3
select PCI select PCI
help help
Support for Intel's IXP23xx (XScale) family of processors. Support for Intel's IXP23xx (XScale) family of processors.
...@@ -345,6 +353,7 @@ config ARCH_IXP23XX ...@@ -345,6 +353,7 @@ config ARCH_IXP23XX
config ARCH_IXP2000 config ARCH_IXP2000
bool "IXP2400/2800-based" bool "IXP2400/2800-based"
depends on MMU depends on MMU
select CPU_XSCALE
select PCI select PCI
help help
Support for Intel's IXP2400/2800 (XScale) family of processors. Support for Intel's IXP2400/2800 (XScale) family of processors.
...@@ -352,6 +361,7 @@ config ARCH_IXP2000 ...@@ -352,6 +361,7 @@ config ARCH_IXP2000
config ARCH_IXP4XX config ARCH_IXP4XX
bool "IXP4xx-based" bool "IXP4xx-based"
depends on MMU depends on MMU
select CPU_XSCALE
select GENERIC_GPIO select GENERIC_GPIO
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
...@@ -361,6 +371,7 @@ config ARCH_IXP4XX ...@@ -361,6 +371,7 @@ config ARCH_IXP4XX
config ARCH_L7200 config ARCH_L7200
bool "LinkUp-L7200" bool "LinkUp-L7200"
select CPU_ARM720T
select FIQ select FIQ
help help
Say Y here if you intend to run this kernel on a LinkUp Systems Say Y here if you intend to run this kernel on a LinkUp Systems
...@@ -374,7 +385,9 @@ config ARCH_L7200 ...@@ -374,7 +385,9 @@ config ARCH_L7200
config ARCH_KIRKWOOD config ARCH_KIRKWOOD
bool "Marvell Kirkwood" bool "Marvell Kirkwood"
select CPU_FEROCEON
select PCI select PCI
select GENERIC_GPIO
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select PLAT_ORION select PLAT_ORION
...@@ -384,13 +397,16 @@ config ARCH_KIRKWOOD ...@@ -384,13 +397,16 @@ config ARCH_KIRKWOOD
config ARCH_KS8695 config ARCH_KS8695
bool "Micrel/Kendin KS8695" bool "Micrel/Kendin KS8695"
select CPU_ARM922T
select GENERIC_GPIO select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
help help
Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
System-on-Chip devices. System-on-Chip devices.
config ARCH_NS9XXX config ARCH_NS9XXX
bool "NetSilicon NS9xxx" bool "NetSilicon NS9xxx"
select CPU_ARM926T
select GENERIC_GPIO select GENERIC_GPIO
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
...@@ -403,6 +419,7 @@ config ARCH_NS9XXX ...@@ -403,6 +419,7 @@ config ARCH_NS9XXX
config ARCH_LOKI config ARCH_LOKI
bool "Marvell Loki (88RC8480)" bool "Marvell Loki (88RC8480)"
select CPU_FEROCEON
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select PLAT_ORION select PLAT_ORION
...@@ -411,7 +428,9 @@ config ARCH_LOKI ...@@ -411,7 +428,9 @@ config ARCH_LOKI
config ARCH_MV78XX0 config ARCH_MV78XX0
bool "Marvell MV78xx0" bool "Marvell MV78xx0"
select CPU_FEROCEON
select PCI select PCI
select GENERIC_GPIO
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select PLAT_ORION select PLAT_ORION
...@@ -432,6 +451,7 @@ config ARCH_MXC ...@@ -432,6 +451,7 @@ config ARCH_MXC
config ARCH_ORION5X config ARCH_ORION5X
bool "Marvell Orion" bool "Marvell Orion"
depends on MMU depends on MMU
select CPU_FEROCEON
select PCI select PCI
select GENERIC_GPIO select GENERIC_GPIO
select GENERIC_TIME select GENERIC_TIME
...@@ -444,6 +464,7 @@ config ARCH_ORION5X ...@@ -444,6 +464,7 @@ config ARCH_ORION5X
config ARCH_PNX4008 config ARCH_PNX4008
bool "Philips Nexperia PNX4008 Mobile" bool "Philips Nexperia PNX4008 Mobile"
select CPU_ARM926T
select HAVE_CLK select HAVE_CLK
help help
This enables support for Philips PNX4008 mobile platform. This enables support for Philips PNX4008 mobile platform.
...@@ -454,6 +475,7 @@ config ARCH_PXA ...@@ -454,6 +475,7 @@ config ARCH_PXA
select ARCH_MTD_XIP select ARCH_MTD_XIP
select GENERIC_GPIO select GENERIC_GPIO
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
...@@ -477,6 +499,7 @@ config ARCH_RPC ...@@ -477,6 +499,7 @@ config ARCH_RPC
config ARCH_SA1100 config ARCH_SA1100
bool "SA1100-based" bool "SA1100-based"
select CPU_SA1100
select ISA select ISA
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
select ARCH_MTD_XIP select ARCH_MTD_XIP
...@@ -498,8 +521,16 @@ config ARCH_S3C2410 ...@@ -498,8 +521,16 @@ config ARCH_S3C2410
BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
the Samsung SMDK2410 development board (and derivatives). the Samsung SMDK2410 development board (and derivatives).
config ARCH_S3C64XX
bool "Samsung S3C64XX"
select GENERIC_GPIO
select HAVE_CLK
help
Samsung S3C64XX series based systems
config ARCH_SHARK config ARCH_SHARK
bool "Shark" bool "Shark"
select CPU_SA110
select ISA select ISA
select ISA_DMA select ISA_DMA
select ZONE_DMA select ZONE_DMA
...@@ -510,6 +541,7 @@ config ARCH_SHARK ...@@ -510,6 +541,7 @@ config ARCH_SHARK
config ARCH_LH7A40X config ARCH_LH7A40X
bool "Sharp LH7A40X" bool "Sharp LH7A40X"
select CPU_ARM922T
select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
help help
...@@ -520,6 +552,7 @@ config ARCH_LH7A40X ...@@ -520,6 +552,7 @@ config ARCH_LH7A40X
config ARCH_DAVINCI config ARCH_DAVINCI
bool "TI DaVinci" bool "TI DaVinci"
select CPU_ARM926T
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GENERIC_GPIO select GENERIC_GPIO
...@@ -541,6 +574,7 @@ config ARCH_OMAP ...@@ -541,6 +574,7 @@ config ARCH_OMAP
config ARCH_MSM config ARCH_MSM
bool "Qualcomm MSM" bool "Qualcomm MSM"
select CPU_V6
select GENERIC_TIME select GENERIC_TIME
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
help help
...@@ -549,6 +583,13 @@ config ARCH_MSM ...@@ -549,6 +583,13 @@ config ARCH_MSM
interface to the ARM9 modem processor which runs the baseband stack interface to the ARM9 modem processor which runs the baseband stack
and controls some vital subsystems (clock and power control, etc). and controls some vital subsystems (clock and power control, etc).
config ARCH_W90X900
bool "Nuvoton W90X900 CPU"
select CPU_ARM926T
help
Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
can login www.mcuos.com or www.nuvoton.com to know more.
endchoice endchoice
source "arch/arm/mach-clps711x/Kconfig" source "arch/arm/mach-clps711x/Kconfig"
...@@ -590,6 +631,7 @@ source "arch/arm/mach-orion5x/Kconfig" ...@@ -590,6 +631,7 @@ source "arch/arm/mach-orion5x/Kconfig"
source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/mach-kirkwood/Kconfig"
source "arch/arm/plat-s3c24xx/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig"
source "arch/arm/plat-s3c64xx/Kconfig"
source "arch/arm/plat-s3c/Kconfig" source "arch/arm/plat-s3c/Kconfig"
if ARCH_S3C2410 if ARCH_S3C2410
...@@ -601,6 +643,11 @@ source "arch/arm/mach-s3c2442/Kconfig" ...@@ -601,6 +643,11 @@ source "arch/arm/mach-s3c2442/Kconfig"
source "arch/arm/mach-s3c2443/Kconfig" source "arch/arm/mach-s3c2443/Kconfig"
endif endif
if ARCH_S3C64XX
source "arch/arm/mach-s3c6400/Kconfig"
source "arch/arm/mach-s3c6410/Kconfig"
endif
source "arch/arm/mach-lh7a40x/Kconfig" source "arch/arm/mach-lh7a40x/Kconfig"
source "arch/arm/mach-imx/Kconfig" source "arch/arm/mach-imx/Kconfig"
...@@ -627,6 +674,8 @@ source "arch/arm/mach-ks8695/Kconfig" ...@@ -627,6 +674,8 @@ source "arch/arm/mach-ks8695/Kconfig"
source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-msm/Kconfig"
source "arch/arm/mach-w90x900/Kconfig"
# Definitions to make life easier # Definitions to make life easier
config ARCH_ACORN config ARCH_ACORN
bool bool
...@@ -781,7 +830,7 @@ config HOTPLUG_CPU ...@@ -781,7 +830,7 @@ config HOTPLUG_CPU
config LOCAL_TIMERS config LOCAL_TIMERS
bool "Use local timer interrupts" bool "Use local timer interrupts"
depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
default y default y
help help
Enable support for local timers on SMP platforms, rather then the Enable support for local timers on SMP platforms, rather then the
......
...@@ -76,6 +76,7 @@ tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110 ...@@ -76,6 +76,7 @@ tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100 tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale tune-$(CONFIG_CPU_XSCALE) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
tune-$(CONFIG_CPU_XSC3) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale tune-$(CONFIG_CPU_XSC3) :=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
tune-$(CONFIG_CPU_FEROCEON) :=$(call cc-option,-mtune=marvell-f,-mtune=xscale)
tune-$(CONFIG_CPU_V6) :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm) tune-$(CONFIG_CPU_V6) :=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
ifeq ($(CONFIG_AEABI),y) ifeq ($(CONFIG_AEABI),y)
...@@ -96,7 +97,6 @@ textofs-y := 0x00008000 ...@@ -96,7 +97,6 @@ textofs-y := 0x00008000
machine-$(CONFIG_ARCH_RPC) := rpc machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_EBSA110) := ebsa110 machine-$(CONFIG_ARCH_EBSA110) := ebsa110
machine-$(CONFIG_ARCH_CLPS7500) := clps7500
machine-$(CONFIG_FOOTBRIDGE) := footbridge machine-$(CONFIG_FOOTBRIDGE) := footbridge
machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SHARK) := shark
machine-$(CONFIG_ARCH_SA1100) := sa1100 machine-$(CONFIG_ARCH_SA1100) := sa1100
...@@ -121,7 +121,10 @@ endif ...@@ -121,7 +121,10 @@ endif
machine-$(CONFIG_ARCH_OMAP3) := omap2 machine-$(CONFIG_ARCH_OMAP3) := omap2
plat-$(CONFIG_ARCH_OMAP) := omap plat-$(CONFIG_ARCH_OMAP) := omap
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c
machine-$(CONFIG_ARCH_S3C64XX) := s3c6400 s3c6410
plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c
machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x
machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_VERSATILE) := versatile
machine-$(CONFIG_ARCH_IMX) := imx machine-$(CONFIG_ARCH_IMX) := imx
...@@ -139,11 +142,13 @@ endif ...@@ -139,11 +142,13 @@ endif
plat-$(CONFIG_ARCH_MXC) := mxc plat-$(CONFIG_ARCH_MXC) := mxc
machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX2) := mx2
machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_MX3) := mx3
machine-$(CONFIG_ARCH_MX1) := mx1
machine-$(CONFIG_ARCH_ORION5X) := orion5x machine-$(CONFIG_ARCH_ORION5X) := orion5x
plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_ORION) := orion
machine-$(CONFIG_ARCH_MSM) := msm machine-$(CONFIG_ARCH_MSM) := msm
machine-$(CONFIG_ARCH_LOKI) := loki machine-$(CONFIG_ARCH_LOKI) := loki
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
machine-$(CONFIG_ARCH_W90X900) := w90x900
ifeq ($(CONFIG_ARCH_EBSA110),y) ifeq ($(CONFIG_ARCH_EBSA110),y)
# This is what happens if you forget the IOCS16 line. # This is what happens if you forget the IOCS16 line.
......
...@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y) ...@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
OBJS += head-l7200.o OBJS += head-l7200.o
endif endif
ifeq ($(CONFIG_ARCH_CLPS7500),y)
HEAD = head-clps7500.o
endif
ifeq ($(CONFIG_ARCH_P720T),y) ifeq ($(CONFIG_ARCH_P720T),y)
# Borrow this code from SA1100 # Borrow this code from SA1100
OBJS += head-sa1100.o OBJS += head-sa1100.o
......
/*
* linux/arch/arm/boot/compressed/head-clps7500.S
*
* Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
*/
/* There are three different ways the kernel can be
booted on a 7500 system: from Angel (loaded in RAM), from
16-bit ROM or from 32-bit Flash. Luckily, a single kernel
image does for them all. */
/* This branch is taken if the CPU memory width matches the
actual device in use. The default at power on is 16 bits
so we must be prepared for a mismatch. */
.section ".start", "ax"
2:
b 1f
.word 0xffff
.word 0xb632 @ mov r11, #0x03200000
.word 0xe3a0
.word 0x0000 @ mov r0, #0
.word 0xe3a0
.word 0x0080 @ strb r0, [r11, #0x80]
.word 0xe5cb
.word 0xf000 @ mov pc, #0
.word 0xe3a0
1:
adr r1, 2b
teq r1, #0
bne .Langel
/* This is a direct-from-ROM boot. Copy the kernel into
RAM and run it there. */
mov r0, #0x30
mcr p15, 0, r0, c1, c0, 0
mov r0, #0x13
msr cpsr_cxsf, r0
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
mov r0, #0x5500
str r0, [r12]
mov r0, #0x10000000
orr r0, r0, #0x8000
mov r4, r0
ldr r2, =_end
2:
ldr r3, [r1], #4
str r3, [r0], #4
teq r0, r2
bne 2b
mov r0, #0xff00
str r0, [r12]
1:
mov r12, #0x03000000 @ point to LEDs
orr r12, r12, #0x00020000
orr r12, r12, #0xba00
mov r0, #0xfe00
str r0, [r12]
adr lr, 1f
mov r0, #0
mov r1, #14 /* MACH_TYPE_CLPS7500 */
mov pc, lr
.Langel:
#ifdef CONFIG_ANGELBOOT
/* Call Angel to switch into SVC mode. */
mov r0, #0x17
swi 0x123456
#endif
/* Ensure all interrupts are off and MMU disabled */
mrs r0, cpsr
orr r0, r0, #0xc0
msr cpsr_cxsf, r0
adr lr, 1b
orr lr, lr, #0x10000000
mov r0, #0x30 @ MMU off
mcr p15, 0, r0, c1, c0, 0
mov r0, r0
mov pc, lr
.ltorg
1:
/* And the rest */
#include "head.S"
...@@ -624,6 +624,12 @@ proc_types: ...@@ -624,6 +624,12 @@ proc_types:
b __armv4_mmu_cache_off b __armv4_mmu_cache_off
b __armv4_mmu_cache_flush b __armv4_mmu_cache_flush
.word 0x56056930
.word 0xff0ffff0 @ PXA935
b __armv4_mmu_cache_on
b __armv4_mmu_cache_off
b __armv4_mmu_cache_flush
.word 0x56050000 @ Feroceon .word 0x56050000 @ Feroceon
.word 0xff0f0000 .word 0xff0f0000
b __armv4_mmu_cache_on b __armv4_mmu_cache_on
...@@ -717,6 +723,9 @@ __armv7_mmu_cache_off: ...@@ -717,6 +723,9 @@ __armv7_mmu_cache_off:
bl __armv7_mmu_cache_flush bl __armv7_mmu_cache_flush
mov r0, #0 mov r0, #0
mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB mcr p15, 0, r0, c8, c7, 0 @ invalidate whole TLB
mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC
mcr p15, 0, r0, c7, c10, 4 @ DSB
mcr p15, 0, r0, c7, c5, 4 @ ISB
mov pc, r12 mov pc, r12
__arm6_mmu_cache_off: __arm6_mmu_cache_off:
...@@ -778,12 +787,13 @@ __armv6_mmu_cache_flush: ...@@ -778,12 +787,13 @@ __armv6_mmu_cache_flush:
__armv7_mmu_cache_flush: __armv7_mmu_cache_flush:
mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1 mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
tst r10, #0xf << 16 @ hierarchical cache (ARMv7) tst r10, #0xf << 16 @ hierarchical cache (ARMv7)
beq hierarchical
mov r10, #0 mov r10, #0
beq hierarchical
mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D mcr p15, 0, r10, c7, c14, 0 @ clean+invalidate D
b iflush b iflush
hierarchical: hierarchical:
stmfd sp!, {r0-r5, r7, r9-r11} mcr p15, 0, r10, c7, c10, 5 @ DMB
stmfd sp!, {r0-r5, r7, r9, r11}
mrc p15, 1, r0, c0, c0, 1 @ read clidr mrc p15, 1, r0, c0, c0, 1 @ read clidr
ands r3, r0, #0x7000000 @ extract loc from clidr ands r3, r0, #0x7000000 @ extract loc from clidr
mov r3, r3, lsr #23 @ left align loc bit field mov r3, r3, lsr #23 @ left align loc bit field
...@@ -820,12 +830,14 @@ skip: ...@@ -820,12 +830,14 @@ skip:
cmp r3, r10 cmp r3, r10
bgt loop1 bgt loop1
finished: finished:
ldmfd sp!, {r0-r5, r7, r9, r11}
mov r10, #0 @ swith back to cache level 0 mov r10, #0 @ swith back to cache level 0
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
ldmfd sp!, {r0-r5, r7, r9-r11}
iflush: iflush:
mcr p15, 0, r10, c7, c10, 4 @ DSB
mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB
mcr p15, 0, r10, c7, c10, 4 @ drain WB mcr p15, 0, r10, c7, c10, 4 @ DSB
mcr p15, 0, r10, c7, c5, 4 @ ISB
mov pc, lr mov pc, lr
__armv5tej_mmu_cache_flush: __armv5tej_mmu_cache_flush:
......
...@@ -86,6 +86,8 @@ static void putstr(const char *ptr) ...@@ -86,6 +86,8 @@ static void putstr(const char *ptr)
#define __ptr_t void * #define __ptr_t void *
#define memzero(s,n) __memzero(s,n)
/* /*
* Optimised C version of memzero for the ARM. * Optimised C version of memzero for the ARM.
*/ */
......
...@@ -33,3 +33,6 @@ config SHARPSL_PM ...@@ -33,3 +33,6 @@ config SHARPSL_PM
config SHARP_SCOOP config SHARP_SCOOP
bool bool
config COMMON_CLKDEV
bool
...@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o ...@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o
obj-$(CONFIG_ARCH_IXP2000) += uengine.o obj-$(CONFIG_ARCH_IXP2000) += uengine.o
obj-$(CONFIG_ARCH_IXP23XX) += uengine.o obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o
/*
* arch/arm/common/clkdev.c
*
* Copyright (C) 2008 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Helper for the clk API to assist looking up a struct clk.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/mutex.h>
#include <asm/clkdev.h>
#include <mach/clkdev.h>
static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static struct clk *clk_find(const char *dev_id, const char *con_id)
{
struct clk_lookup *p;
struct clk *clk = NULL;
int match, best = 0;
list_for_each_entry(p, &clocks, node) {
if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
continue;
match = 0;
if (p->dev_id)
match += 2 * (strcmp(p->dev_id, dev_id) == 0);
if (p->con_id)
match += 1 * (strcmp(p->con_id, con_id) == 0);
if (match == 0)
continue;
if (match > best) {
clk = p->clk;
best = match;
}
}
return clk;
}
struct clk *clk_get(struct device *dev, const char *con_id)
{
const char *dev_id = dev ? dev_name(dev) : NULL;
struct clk *clk;
mutex_lock(&clocks_mutex);
clk = clk_find(dev_id, con_id);
if (clk && !__clk_get(clk))
clk = NULL;
mutex_unlock(&clocks_mutex);
return clk ? clk : ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);
void clk_put(struct clk *clk)
{
__clk_put(clk);
}
EXPORT_SYMBOL(clk_put);
void clkdev_add(struct clk_lookup *cl)
{
mutex_lock(&clocks_mutex);
list_add_tail(&cl->node, &clocks);
mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL(clkdev_add);
#define MAX_DEV_ID 20
#define MAX_CON_ID 16
struct clk_lookup_alloc {
struct clk_lookup cl;
char dev_id[MAX_DEV_ID];
char con_id[MAX_CON_ID];
};
struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
const char *dev_fmt, ...)
{
struct clk_lookup_alloc *cla;
cla = kzalloc(sizeof(*cla), GFP_KERNEL);
if (!cla)
return NULL;
cla->cl.clk = clk;
if (con_id) {
strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
cla->cl.con_id = cla->con_id;
}
if (dev_fmt) {
va_list ap;
va_start(ap, dev_fmt);
vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
cla->cl.dev_id = cla->dev_id;
va_end(ap);
}
return &cla->cl;
}
EXPORT_SYMBOL(clkdev_alloc);
/*
* clkdev_drop - remove a clock dynamically allocated
*/
void clkdev_drop(struct clk_lookup *cl)
{
mutex_lock(&clocks_mutex);
list_del(&cl->node);
mutex_unlock(&clocks_mutex);
kfree(cl);
}
EXPORT_SYMBOL(clkdev_drop);
...@@ -1108,6 +1108,7 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf) ...@@ -1108,6 +1108,7 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS); locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS);
spin_unlock_irqrestore(&lchip->lock, flags); spin_unlock_irqrestore(&lchip->lock, flags);
} }
EXPORT_SYMBOL(locomo_frontlight_set);
/* /*
* LoCoMo "Register Access Bus." * LoCoMo "Register Access Bus."
......
...@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, ...@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
/* /*
* Make sure we clear all existing interrupts * Make sure we clear all existing interrupts
*/ */
writel(0, base + VIC_VECT_ADDR); writel(0, base + VIC_PL190_VECT_ADDR);
for (i = 0; i < 19; i++) { for (i = 0; i < 19; i++) {
unsigned int value; unsigned int value;
value = readl(base + VIC_VECT_ADDR); value = readl(base + VIC_PL190_VECT_ADDR);
writel(value, base + VIC_VECT_ADDR); writel(value, base + VIC_PL190_VECT_ADDR);
} }
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
...@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, ...@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
writel(VIC_VECT_CNTL_ENABLE | i, reg); writel(VIC_VECT_CNTL_ENABLE | i, reg);
} }
writel(32, base + VIC_DEF_VECT_ADDR); writel(32, base + VIC_PL190_DEF_VECT_ADDR);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
unsigned int irq = irq_start + i; unsigned int irq = irq_start + i;
......
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...@@ -728,9 +728,9 @@ CONFIG_RTC_CLASS=m ...@@ -728,9 +728,9 @@ CONFIG_RTC_CLASS=m
# #
# RTC interfaces # RTC interfaces
# #
CONFIG_RTC_INTF_SYSFS=m CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=m CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=m CONFIG_RTC_INTF_DEV=y
# #
# RTC drivers # RTC drivers
......
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...@@ -316,7 +316,82 @@ CONFIG_BINFMT_MISC=y ...@@ -316,7 +316,82 @@ CONFIG_BINFMT_MISC=y
# #
# CONFIG_PM is not set # CONFIG_PM is not set
CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_NET is not set CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
CONFIG_XFRM_USER=y
# CONFIG_XFRM_SUB_POLICY is not set
CONFIG_XFRM_MIGRATE=y
# CONFIG_XFRM_STATISTICS is not set
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_RARP=y
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_PHONET is not set
# CONFIG_WIRELESS is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# #
# Device Drivers # Device Drivers
...@@ -332,6 +407,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y ...@@ -332,6 +407,8 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set # CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set # CONFIG_SYS_HYPERVISOR is not set
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
# CONFIG_MTD is not set # CONFIG_MTD is not set
# CONFIG_PARPORT is not set # CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y CONFIG_BLK_DEV=y
...@@ -390,6 +467,54 @@ CONFIG_SCSI_LOWLEVEL=y ...@@ -390,6 +467,54 @@ CONFIG_SCSI_LOWLEVEL=y
# CONFIG_SCSI_DH is not set # CONFIG_SCSI_DH is not set
# CONFIG_ATA is not set # CONFIG_ATA is not set
# CONFIG_MD is not set # CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_AX88796 is not set
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
CONFIG_SMC911X=y
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
CONFIG_NETDEV_1000=y
CONFIG_NETDEV_10000=y
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_IWLWIFI_LEDS is not set
#
# USB Network Adapters
#
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET is not set
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# #
# Input device support # Input device support
...@@ -816,6 +941,27 @@ CONFIG_TMPFS=y ...@@ -816,6 +941,27 @@ CONFIG_TMPFS=y
# CONFIG_ROMFS_FS is not set # CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set # CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set # CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
# CONFIG_SUNRPC_REGISTER_V4 is not set
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# #
# Partition Types # Partition Types
......
...@@ -1069,9 +1069,9 @@ CONFIG_RTC_CLASS=m ...@@ -1069,9 +1069,9 @@ CONFIG_RTC_CLASS=m
# #
# RTC interfaces # RTC interfaces
# #
CONFIG_RTC_INTF_SYSFS=m CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=m CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=m CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# #
......
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/*
* arch/arm/include/asm/clkdev.h
*
* Copyright (C) 2008 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Helper for the clk API to assist looking up a struct clk.
*/
#ifndef __ASM_CLKDEV_H
#define __ASM_CLKDEV_H
struct clk;
struct clk_lookup {
struct list_head node;
const char *dev_id;
const char *con_id;
struct clk *clk;
};
struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
const char *dev_fmt, ...);
void clkdev_add(struct clk_lookup *cl);
void clkdev_drop(struct clk_lookup *cl);
#endif
...@@ -69,7 +69,9 @@ extern void dma_cache_maint(const void *kaddr, size_t size, int rw); ...@@ -69,7 +69,9 @@ extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
*/ */
static inline int dma_supported(struct device *dev, u64 mask) static inline int dma_supported(struct device *dev, u64 mask)
{ {
return dev->dma_mask && *dev->dma_mask != 0; if (mask < ISA_DMA_THRESHOLD)
return 0;
return 1;
} }
static inline int dma_set_mask(struct device *dev, u64 dma_mask) static inline int dma_set_mask(struct device *dev, u64 dma_mask)
......
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