Commit 1654e95e authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'x86_urgent_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

 - Add the model number of a new, Raptor Lake CPU, to intel-family.h

 - Do not log spurious corrected MCEs on SKL too, due to an erratum

 - Clarify the path of paravirt ops patches upstream

 - Add an optimization to avoid writing out AMX components to sigframes
   when former are in init state

* tag 'x86_urgent_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Add Raptor Lake to Intel family
  x86/mce: Add errata workaround for Skylake SKX37
  MAINTAINERS: Add some information to PARAVIRT_OPS entry
  x86/fpu: Optimize out sigframe xfeatures when in init state
parents 35c8fad4 fbdb5e8f
...@@ -63,3 +63,12 @@ kernel sends SIGILL to the application. If the process has permission then ...@@ -63,3 +63,12 @@ kernel sends SIGILL to the application. If the process has permission then
the handler allocates a larger xstate buffer for the task so the large the handler allocates a larger xstate buffer for the task so the large
state can be context switched. In the unlikely cases that the allocation state can be context switched. In the unlikely cases that the allocation
fails, the kernel sends SIGSEGV. fails, the kernel sends SIGSEGV.
Dynamic features in signal frames
---------------------------------
Dynamcally enabled features are not written to the signal frame upon signal
entry if the feature is in its initial configuration. This differs from
non-dynamic features which are always written regardless of their
configuration. Signal handlers can examine the XSAVE buffer's XSTATE_BV
field to determine if a features was written.
...@@ -14412,7 +14412,9 @@ M: Juergen Gross <jgross@suse.com> ...@@ -14412,7 +14412,9 @@ M: Juergen Gross <jgross@suse.com>
M: Deep Shah <sdeep@vmware.com> M: Deep Shah <sdeep@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com> M: "VMware, Inc." <pv-drivers@vmware.com>
L: virtualization@lists.linux-foundation.org L: virtualization@lists.linux-foundation.org
L: x86@kernel.org
S: Supported S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
F: Documentation/virt/paravirt_ops.rst F: Documentation/virt/paravirt_ops.rst
F: arch/*/include/asm/paravirt*.h F: arch/*/include/asm/paravirt*.h
F: arch/*/kernel/paravirt* F: arch/*/kernel/paravirt*
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
#define _ASM_X86_FPU_XCR_H #define _ASM_X86_FPU_XCR_H
#define XCR_XFEATURE_ENABLED_MASK 0x00000000 #define XCR_XFEATURE_ENABLED_MASK 0x00000000
#define XCR_XFEATURE_IN_USE_MASK 0x00000001
static inline u64 xgetbv(u32 index) static inline u64 xgetbv(u32 index)
{ {
...@@ -20,4 +21,15 @@ static inline void xsetbv(u32 index, u64 value) ...@@ -20,4 +21,15 @@ static inline void xsetbv(u32 index, u64 value)
asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index)); asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index));
} }
/*
* Return a mask of xfeatures which are currently being tracked
* by the processor as being in the initial configuration.
*
* Callers should check X86_FEATURE_XGETBV1.
*/
static inline u64 xfeatures_in_use(void)
{
return xgetbv(XCR_XFEATURE_IN_USE_MASK);
}
#endif /* _ASM_X86_FPU_XCR_H */ #endif /* _ASM_X86_FPU_XCR_H */
...@@ -92,6 +92,13 @@ ...@@ -92,6 +92,13 @@
#define XFEATURE_MASK_FPSTATE (XFEATURE_MASK_USER_RESTORE | \ #define XFEATURE_MASK_FPSTATE (XFEATURE_MASK_USER_RESTORE | \
XFEATURE_MASK_SUPERVISOR_SUPPORTED) XFEATURE_MASK_SUPERVISOR_SUPPORTED)
/*
* Features in this mask have space allocated in the signal frame, but may not
* have that space initialized when the feature is in its init state.
*/
#define XFEATURE_MASK_SIGFRAME_INITOPT (XFEATURE_MASK_XTILE | \
XFEATURE_MASK_USER_DYNAMIC)
extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS]; extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
extern void __init update_regset_xstate_info(unsigned int size, extern void __init update_regset_xstate_info(unsigned int size,
......
...@@ -108,6 +108,8 @@ ...@@ -108,6 +108,8 @@
#define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */ #define INTEL_FAM6_ALDERLAKE 0x97 /* Golden Cove / Gracemont */
#define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */ #define INTEL_FAM6_ALDERLAKE_L 0x9A /* Golden Cove / Gracemont */
#define INTEL_FAM6_RAPTOR_LAKE 0xB7
/* "Small Core" Processors (Atom) */ /* "Small Core" Processors (Atom) */
#define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
......
...@@ -76,6 +76,7 @@ static const struct cpuid_dep cpuid_deps[] = { ...@@ -76,6 +76,7 @@ static const struct cpuid_dep cpuid_deps[] = {
{ X86_FEATURE_SGX1, X86_FEATURE_SGX }, { X86_FEATURE_SGX1, X86_FEATURE_SGX },
{ X86_FEATURE_SGX2, X86_FEATURE_SGX1 }, { X86_FEATURE_SGX2, X86_FEATURE_SGX1 },
{ X86_FEATURE_XFD, X86_FEATURE_XSAVES }, { X86_FEATURE_XFD, X86_FEATURE_XSAVES },
{ X86_FEATURE_XFD, X86_FEATURE_XGETBV1 },
{ X86_FEATURE_AMX_TILE, X86_FEATURE_XFD }, { X86_FEATURE_AMX_TILE, X86_FEATURE_XFD },
{} {}
}; };
......
...@@ -547,12 +547,13 @@ bool intel_filter_mce(struct mce *m) ...@@ -547,12 +547,13 @@ bool intel_filter_mce(struct mce *m)
{ {
struct cpuinfo_x86 *c = &boot_cpu_data; struct cpuinfo_x86 *c = &boot_cpu_data;
/* MCE errata HSD131, HSM142, HSW131, BDM48, and HSM142 */ /* MCE errata HSD131, HSM142, HSW131, BDM48, HSM142 and SKX37 */
if ((c->x86 == 6) && if ((c->x86 == 6) &&
((c->x86_model == INTEL_FAM6_HASWELL) || ((c->x86_model == INTEL_FAM6_HASWELL) ||
(c->x86_model == INTEL_FAM6_HASWELL_L) || (c->x86_model == INTEL_FAM6_HASWELL_L) ||
(c->x86_model == INTEL_FAM6_BROADWELL) || (c->x86_model == INTEL_FAM6_BROADWELL) ||
(c->x86_model == INTEL_FAM6_HASWELL_G)) && (c->x86_model == INTEL_FAM6_HASWELL_G) ||
(c->x86_model == INTEL_FAM6_SKYLAKE_X)) &&
(m->bank == 0) && (m->bank == 0) &&
((m->status & 0xa0000000ffffffff) == 0x80000000000f0005)) ((m->status & 0xa0000000ffffffff) == 0x80000000000f0005))
return true; return true;
......
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
#include <asm/cpufeature.h> #include <asm/cpufeature.h>
#include <asm/fpu/xstate.h> #include <asm/fpu/xstate.h>
#include <asm/fpu/xcr.h>
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
DECLARE_PER_CPU(u64, xfd_state); DECLARE_PER_CPU(u64, xfd_state);
...@@ -198,6 +199,32 @@ static inline void os_xrstor_supervisor(struct fpstate *fpstate) ...@@ -198,6 +199,32 @@ static inline void os_xrstor_supervisor(struct fpstate *fpstate)
XSTATE_XRESTORE(&fpstate->regs.xsave, lmask, hmask); XSTATE_XRESTORE(&fpstate->regs.xsave, lmask, hmask);
} }
/*
* XSAVE itself always writes all requested xfeatures. Removing features
* from the request bitmap reduces the features which are written.
* Generate a mask of features which must be written to a sigframe. The
* unset features can be optimized away and not written.
*
* This optimization is user-visible. Only use for states where
* uninitialized sigframe contents are tolerable, like dynamic features.
*
* Users of buffers produced with this optimization must check XSTATE_BV
* to determine which features have been optimized out.
*/
static inline u64 xfeatures_need_sigframe_write(void)
{
u64 xfeaures_to_write;
/* In-use features must be written: */
xfeaures_to_write = xfeatures_in_use();
/* Also write all non-optimizable sigframe features: */
xfeaures_to_write |= XFEATURE_MASK_USER_SUPPORTED &
~XFEATURE_MASK_SIGFRAME_INITOPT;
return xfeaures_to_write;
}
/* /*
* Save xstate to user space xsave area. * Save xstate to user space xsave area.
* *
...@@ -220,10 +247,16 @@ static inline int xsave_to_user_sigframe(struct xregs_state __user *buf) ...@@ -220,10 +247,16 @@ static inline int xsave_to_user_sigframe(struct xregs_state __user *buf)
*/ */
struct fpstate *fpstate = current->thread.fpu.fpstate; struct fpstate *fpstate = current->thread.fpu.fpstate;
u64 mask = fpstate->user_xfeatures; u64 mask = fpstate->user_xfeatures;
u32 lmask = mask; u32 lmask;
u32 hmask = mask >> 32; u32 hmask;
int err; int err;
/* Optimize away writing unnecessary xfeatures: */
if (fpu_state_size_dynamic())
mask &= xfeatures_need_sigframe_write();
lmask = mask;
hmask = mask >> 32;
xfd_validate_state(fpstate, mask, false); xfd_validate_state(fpstate, mask, false);
stac(); stac();
......
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