Commit 18653d4b authored by Arınç ÜNAL's avatar Arınç ÜNAL Committed by Linus Walleij

pinctrl: ralink: rename variable names for functions on MT7620 and MT7621

Variables for functions include "grp" on the Ralink MT7620 and MT7621
subdrivers. Rename them to "func" instead as they define the functions for
the pin groups.
Signed-off-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Acked-by: default avatarSergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20220414173916.5552-6-arinc.unal@arinc9.comSigned-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent f5dff8ac
This diff is collapsed.
...@@ -34,59 +34,59 @@ ...@@ -34,59 +34,59 @@
#define MT7621_GPIO_MODE_SDHCI_SHIFT 18 #define MT7621_GPIO_MODE_SDHCI_SHIFT 18
#define MT7621_GPIO_MODE_SDHCI_GPIO 1 #define MT7621_GPIO_MODE_SDHCI_GPIO 1
static struct ralink_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) }; static struct ralink_pmx_func uart1_func[] = { FUNC("uart1", 0, 1, 2) };
static struct ralink_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) }; static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 3, 2) };
static struct ralink_pmx_func uart3_grp[] = { static struct ralink_pmx_func uart3_func[] = {
FUNC("uart3", 0, 5, 4), FUNC("uart3", 0, 5, 4),
FUNC("i2s", 2, 5, 4), FUNC("i2s", 2, 5, 4),
FUNC("spdif3", 3, 5, 4), FUNC("spdif3", 3, 5, 4),
}; };
static struct ralink_pmx_func uart2_grp[] = { static struct ralink_pmx_func uart2_func[] = {
FUNC("uart2", 0, 9, 4), FUNC("uart2", 0, 9, 4),
FUNC("pcm", 2, 9, 4), FUNC("pcm", 2, 9, 4),
FUNC("spdif2", 3, 9, 4), FUNC("spdif2", 3, 9, 4),
}; };
static struct ralink_pmx_func jtag_grp[] = { FUNC("jtag", 0, 13, 5) }; static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 13, 5) };
static struct ralink_pmx_func wdt_grp[] = { static struct ralink_pmx_func wdt_func[] = {
FUNC("wdt rst", 0, 18, 1), FUNC("wdt rst", 0, 18, 1),
FUNC("wdt refclk", 2, 18, 1), FUNC("wdt refclk", 2, 18, 1),
}; };
static struct ralink_pmx_func pcie_rst_grp[] = { static struct ralink_pmx_func pcie_rst_func[] = {
FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1), FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1),
FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1) FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
}; };
static struct ralink_pmx_func mdio_grp[] = { FUNC("mdio", 0, 20, 2) }; static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 20, 2) };
static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 22, 12) }; static struct ralink_pmx_func rgmii2_func[] = { FUNC("rgmii2", 0, 22, 12) };
static struct ralink_pmx_func spi_grp[] = { static struct ralink_pmx_func spi_func[] = {
FUNC("spi", 0, 34, 7), FUNC("spi", 0, 34, 7),
FUNC("nand1", 2, 34, 7), FUNC("nand1", 2, 34, 7),
}; };
static struct ralink_pmx_func sdhci_grp[] = { static struct ralink_pmx_func sdhci_func[] = {
FUNC("sdhci", 0, 41, 8), FUNC("sdhci", 0, 41, 8),
FUNC("nand2", 2, 41, 8), FUNC("nand2", 2, 41, 8),
}; };
static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 49, 12) }; static struct ralink_pmx_func rgmii1_func[] = { FUNC("rgmii1", 0, 49, 12) };
static struct ralink_pmx_group mt7621_pinmux_data[] = { static struct ralink_pmx_group mt7621_pinmux_data[] = {
GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1), GRP("uart1", uart1_func, 1, MT7621_GPIO_MODE_UART1),
GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C), GRP("i2c", i2c_func, 1, MT7621_GPIO_MODE_I2C),
GRP_G("uart3", uart3_grp, MT7621_GPIO_MODE_UART3_MASK, GRP_G("uart3", uart3_func, MT7621_GPIO_MODE_UART3_MASK,
MT7621_GPIO_MODE_UART3_GPIO, MT7621_GPIO_MODE_UART3_SHIFT), MT7621_GPIO_MODE_UART3_GPIO, MT7621_GPIO_MODE_UART3_SHIFT),
GRP_G("uart2", uart2_grp, MT7621_GPIO_MODE_UART2_MASK, GRP_G("uart2", uart2_func, MT7621_GPIO_MODE_UART2_MASK,
MT7621_GPIO_MODE_UART2_GPIO, MT7621_GPIO_MODE_UART2_SHIFT), MT7621_GPIO_MODE_UART2_GPIO, MT7621_GPIO_MODE_UART2_SHIFT),
GRP("jtag", jtag_grp, 1, MT7621_GPIO_MODE_JTAG), GRP("jtag", jtag_func, 1, MT7621_GPIO_MODE_JTAG),
GRP_G("wdt", wdt_grp, MT7621_GPIO_MODE_WDT_MASK, GRP_G("wdt", wdt_func, MT7621_GPIO_MODE_WDT_MASK,
MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT), MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT),
GRP_G("pcie", pcie_rst_grp, MT7621_GPIO_MODE_PCIE_MASK, GRP_G("pcie", pcie_rst_func, MT7621_GPIO_MODE_PCIE_MASK,
MT7621_GPIO_MODE_PCIE_GPIO, MT7621_GPIO_MODE_PCIE_SHIFT), MT7621_GPIO_MODE_PCIE_GPIO, MT7621_GPIO_MODE_PCIE_SHIFT),
GRP_G("mdio", mdio_grp, MT7621_GPIO_MODE_MDIO_MASK, GRP_G("mdio", mdio_func, MT7621_GPIO_MODE_MDIO_MASK,
MT7621_GPIO_MODE_MDIO_GPIO, MT7621_GPIO_MODE_MDIO_SHIFT), MT7621_GPIO_MODE_MDIO_GPIO, MT7621_GPIO_MODE_MDIO_SHIFT),
GRP("rgmii2", rgmii2_grp, 1, MT7621_GPIO_MODE_RGMII2), GRP("rgmii2", rgmii2_func, 1, MT7621_GPIO_MODE_RGMII2),
GRP_G("spi", spi_grp, MT7621_GPIO_MODE_SPI_MASK, GRP_G("spi", spi_func, MT7621_GPIO_MODE_SPI_MASK,
MT7621_GPIO_MODE_SPI_GPIO, MT7621_GPIO_MODE_SPI_SHIFT), MT7621_GPIO_MODE_SPI_GPIO, MT7621_GPIO_MODE_SPI_SHIFT),
GRP_G("sdhci", sdhci_grp, MT7621_GPIO_MODE_SDHCI_MASK, GRP_G("sdhci", sdhci_func, MT7621_GPIO_MODE_SDHCI_MASK,
MT7621_GPIO_MODE_SDHCI_GPIO, MT7621_GPIO_MODE_SDHCI_SHIFT), MT7621_GPIO_MODE_SDHCI_GPIO, MT7621_GPIO_MODE_SDHCI_SHIFT),
GRP("rgmii1", rgmii1_grp, 1, MT7621_GPIO_MODE_RGMII1), GRP("rgmii1", rgmii1_func, 1, MT7621_GPIO_MODE_RGMII1),
{ 0 } { 0 }
}; };
......
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