Commit 1a901c91 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Rafael J. Wysocki

ACPI: CPPC: Amend documentation in the comments

Currently it's too hard to read the _CPC structure as it's commented.
Reshuffle indentation and style to make it readable.
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent a7904a53
...@@ -604,47 +604,30 @@ static bool is_cppc_supported(int revision, int num_ent) ...@@ -604,47 +604,30 @@ static bool is_cppc_supported(int revision, int num_ent)
/* /*
* An example CPC table looks like the following. * An example CPC table looks like the following.
* *
* Name(_CPC, Package() * Name (_CPC, Package() {
* { * 17, // NumEntries
* 17, * 1, // Revision
* NumEntries * ResourceTemplate() {Register(PCC, 32, 0, 0x120, 2)}, // Highest Performance
* 1, * ResourceTemplate() {Register(PCC, 32, 0, 0x124, 2)}, // Nominal Performance
* // Revision * ResourceTemplate() {Register(PCC, 32, 0, 0x128, 2)}, // Lowest Nonlinear Performance
* ResourceTemplate(){Register(PCC, 32, 0, 0x120, 2)}, * ResourceTemplate() {Register(PCC, 32, 0, 0x12C, 2)}, // Lowest Performance
* // Highest Performance * ResourceTemplate() {Register(PCC, 32, 0, 0x130, 2)}, // Guaranteed Performance Register
* ResourceTemplate(){Register(PCC, 32, 0, 0x124, 2)}, * ResourceTemplate() {Register(PCC, 32, 0, 0x110, 2)}, // Desired Performance Register
* // Nominal Performance * ResourceTemplate() {Register(SystemMemory, 0, 0, 0, 0)},
* ResourceTemplate(){Register(PCC, 32, 0, 0x128, 2)}, * ...
* // Lowest Nonlinear Performance * ...
* ResourceTemplate(){Register(PCC, 32, 0, 0x12C, 2)}, * ...
* // Lowest Performance * }
* ResourceTemplate(){Register(PCC, 32, 0, 0x130, 2)},
* // Guaranteed Performance Register
* ResourceTemplate(){Register(PCC, 32, 0, 0x110, 2)},
* // Desired Performance Register
* ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)},
* ..
* ..
* ..
*
* }
* Each Register() encodes how to access that specific register. * Each Register() encodes how to access that specific register.
* e.g. a sample PCC entry has the following encoding: * e.g. a sample PCC entry has the following encoding:
* *
* Register ( * Register (
* PCC, * PCC, // AddressSpaceKeyword
* AddressSpaceKeyword * 8, // RegisterBitWidth
* 8, * 8, // RegisterBitOffset
* //RegisterBitWidth * 0x30, // RegisterAddress
* 8, * 9, // AccessSize (subspace ID)
* //RegisterBitOffset * )
* 0x30,
* //RegisterAddress
* 9
* //AccessSize (subspace ID)
* 0
* )
* }
*/ */
#ifndef init_freq_invariance_cppc #ifndef init_freq_invariance_cppc
......
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