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Commit 1ade1fb0 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'stm32-dt-for-v4.14-1' of... 

Merge tag 'stm32-dt-for-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt

Pull "STM32 DT updates for v4.14, round 1" from Alexandre Torgue:

Highlights:
----------
 -Add DMA support on STM32F746
 -Add DMA support on STM32H743
 -Add DAC support on STM32H743
 -Add DAC support on STM32F429
 -Add ADC support on STM32H743
 -Enable ADC on stm32h743i-eval board
 -Add CEC support on STM32F7xx MCUs
 -Enable CEC on stm32f769-disco board
 -Remove rdinit from stm32f4 boards

* tag 'stm32-dt-for-v4.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: Add DMA support for STM32H743 SoC
  ARM: dts: stm32: Add DMA support for STM32F746 SoC
  ARM: dts: stm32: enable ADC on stm32h743i-eval board
  ARM: dts: stm32: add ADC support on stm32h743
  ARM: dts: stm32: Add DAC support on stm32h743
  ARM: dts: stm32: Add DAC support on stm32f429
  ARM: dts: stm32: enable CEC for stm32f769 discovery
  ARM: dts: stm32: add CEC for stm32f7 family
  ARM: dts: stm32: reorder stm32h743 nodes
  ARM: dts: stm32: Remove rdinit from bootargs on stm32f429-disco
  ARM: dts: stm32: Remove rdinit from bootargs on stm32f429i-eval
  ARM: dts: stm32: Remove rdinit from bootargs on stm32f469-disco
parents 91d0d294 01d281b6
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Showing with 222 additions and 11 deletions
arch/arm/boot/dts/stm32429i-eval.dts
View file @ 1ade1fb0
......@@ -55,7 +55,7 @@ / {
compatible = "st,stm32429i-eval", "st,stm32f429";
chosen {
bootargs = "root=/dev/ram rdinit=/linuxrc";
bootargs = "root=/dev/ram";
stdout-path = "serial0:115200n8";
};
......
arch/arm/boot/dts/stm32f429-disco.dts
View file @ 1ade1fb0
......@@ -54,7 +54,7 @@ / {
compatible = "st,stm32f429i-disco", "st,stm32f429";
chosen {
bootargs = "root=/dev/ram rdinit=/linuxrc";
bootargs = "root=/dev/ram";
stdout-path = "serial0:115200n8";
};
......
arch/arm/boot/dts/stm32f429.dtsi
View file @ 1ade1fb0
......@@ -361,6 +361,31 @@ i2c1: i2c@40005400 {
status = "disabled";
};
dac: dac@40007400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;
resets = <&rcc STM32F4_APB1_RESET(DAC)>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(DAC)>;
clock-names = "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
dac1: dac@1 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
reg = <1>;
status = "disabled";
};
dac2: dac@2 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
reg = <2>;
status = "disabled";
};
};
usart7: serial@40007800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40007800 0x400>;
......
arch/arm/boot/dts/stm32f469-disco.dts
View file @ 1ade1fb0
......@@ -53,7 +53,7 @@ / {
compatible = "st,stm32f469i-disco", "st,stm32f469";
chosen {
bootargs = "root=/dev/ram rdinit=/linuxrc";
bootargs = "root=/dev/ram";
stdout-path = "serial0:115200n8";
};
......
arch/arm/boot/dts/stm32f746.dtsi
View file @ 1ade1fb0
......@@ -167,6 +167,15 @@ usart5: serial@40005000 {
status = "disabled";
};
cec: cec@40006c00 {
compatible = "st,stm32-cec";
reg = <0x40006C00 0x400>;
interrupts = <94>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(CEC)>, <&rcc 1 CLK_HDMI_CEC>;
clock-names = "cec", "hdmi-cec";
status = "disabled";
};
usart7: serial@40007800 {
compatible = "st,stm32f7-usart", "st,stm32f7-uart";
reg = <0x40007800 0x400>;
......@@ -336,6 +345,15 @@ gpiok: gpio@40022800 {
st,bank-name = "GPIOK";
};
cec_pins_a: cec@0 {
pins {
pinmux = <STM32F746_PA15_FUNC_HDMI_CEC>;
slew-rate = <0>;
drive-open-drain;
bias-disable;
};
};
usart1_pins_a: usart1@0 {
pins1 {
pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
......@@ -380,6 +398,39 @@ rcc: rcc@40023800 {
assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
assigned-clock-rates = <1000000>;
};
dma1: dma@40026000 {
compatible = "st,stm32-dma";
reg = <0x40026000 0x400>;
interrupts = <11>,
<12>,
<13>,
<14>,
<15>,
<16>,
<17>,
<47>;
clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA1)>;
#dma-cells = <4>;
status = "disabled";
};
dma2: dma@40026400 {
compatible = "st,stm32-dma";
reg = <0x40026400 0x400>;
interrupts = <56>,
<57>,
<58>,
<59>,
<60>,
<68>,
<69>,
<70>;
clocks = <&rcc 0 STM32F7_AHB1_CLOCK(DMA2)>;
#dma-cells = <4>;
st,mem2mem;
status = "disabled";
};
};
};
......
arch/arm/boot/dts/stm32f769-disco.dts
View file @ 1ade1fb0
......@@ -63,6 +63,12 @@ aliases {
};
&cec {
pinctrl-0 = <&cec_pins_a>;
pinctrl-names = "default";
status = "okay";
};
&clk_hse {
clock-frequency = <25000000>;
};
......
arch/arm/boot/dts/stm32h743.dtsi
View file @ 1ade1fb0
......@@ -59,6 +59,45 @@ timer_clk: timer-clk {
};
soc {
timer5: timer@40000c00 {
compatible = "st,stm32-timer";
reg = <0x40000c00 0x400>;
interrupts = <50>;
clocks = <&timer_clk>;
};
usart2: serial@40004400 {
compatible = "st,stm32f7-usart", "st,stm32f7-uart";
reg = <0x40004400 0x400>;
interrupts = <38>;
status = "disabled";
clocks = <&timer_clk>;
};
dac: dac@40007400 {
compatible = "st,stm32h7-dac-core";
reg = <0x40007400 0x400>;
clocks = <&timer_clk>;
clock-names = "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
dac1: dac@1 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
reg = <1>;
status = "disabled";
};
dac2: dac@2 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
reg = <2>;
status = "disabled";
};
};
usart1: serial@40011000 {
compatible = "st,stm32f7-usart", "st,stm32f7-uart";
reg = <0x40011000 0x400>;
......@@ -68,19 +107,91 @@ usart1: serial@40011000 {
};
usart2: serial@40004400 {
compatible = "st,stm32f7-usart", "st,stm32f7-uart";
reg = <0x40004400 0x400>;
interrupts = <38>;
dma1: dma@40020000 {
compatible = "st,stm32-dma";
reg = <0x40020000 0x400>;
interrupts = <11>,
<12>,
<13>,
<14>,
<15>,
<16>,
<17>,
<47>;
clocks = <&timer_clk>;
#dma-cells = <4>;
st,mem2mem;
status = "disabled";
};
dma2: dma@40020400 {
compatible = "st,stm32-dma";
reg = <0x40020400 0x400>;
interrupts = <56>,
<57>,
<58>,
<59>,
<60>,
<68>,
<69>,
<70>;
clocks = <&timer_clk>;
#dma-cells = <4>;
st,mem2mem;
status = "disabled";
};
timer5: timer@40000c00 {
compatible = "st,stm32-timer";
reg = <0x40000c00 0x400>;
interrupts = <50>;
adc_12: adc@40022000 {
compatible = "st,stm32h7-adc-core";
reg = <0x40022000 0x400>;
interrupts = <18>;
clocks = <&timer_clk>;
clock-names = "bus";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
adc1: adc@0 {
compatible = "st,stm32h7-adc";
#io-channel-cells = <1>;
reg = <0x0>;
interrupt-parent = <&adc_12>;
interrupts = <0>;
status = "disabled";
};
adc2: adc@100 {
compatible = "st,stm32h7-adc";
#io-channel-cells = <1>;
reg = <0x100>;
interrupt-parent = <&adc_12>;
interrupts = <1>;
status = "disabled";
};
};
adc_3: adc@58026000 {
compatible = "st,stm32h7-adc-core";
reg = <0x58026000 0x400>;
interrupts = <127>;
clocks = <&timer_clk>;
clock-names = "bus";
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
adc3: adc@0 {
compatible = "st,stm32h7-adc";
#io-channel-cells = <1>;
reg = <0x0>;
interrupt-parent = <&adc_3>;
interrupts = <0>;
status = "disabled";
};
};
};
};
......
arch/arm/boot/dts/stm32h743i-eval.dts
View file @ 1ade1fb0
......@@ -60,6 +60,24 @@ memory {
aliases {
serial0 = &usart1;
};
vdda: regulator-vdda {
compatible = "regulator-fixed";
regulator-name = "vdda";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&adc_12 {
vref-supply = <&vdda>;
status = "okay";
adc1: adc@0 {
/* potentiometer */
st,adc-channels = <0>;
status = "okay";
};
};
&clk_hse {
......
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