Commit 1c990e78 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher

drm/amdgpu: declare smuio callback function as static

fix -Wmissing-protoypes warning
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarLikun Gao <Likun.Gao@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8279bb4e
...@@ -35,7 +35,7 @@ static u32 smuio_v11_0_get_rom_data_offset(struct amdgpu_device *adev) ...@@ -35,7 +35,7 @@ static u32 smuio_v11_0_get_rom_data_offset(struct amdgpu_device *adev)
return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA); return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA);
} }
void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) static void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable)
{ {
u32 def, data; u32 def, data;
...@@ -56,7 +56,7 @@ void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable ...@@ -56,7 +56,7 @@ void smuio_v11_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable
WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data); WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data);
} }
void smuio_v11_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) static void smuio_v11_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags)
{ {
u32 data; u32 data;
......
...@@ -35,7 +35,7 @@ static u32 smuio_v9_0_get_rom_data_offset(struct amdgpu_device *adev) ...@@ -35,7 +35,7 @@ static u32 smuio_v9_0_get_rom_data_offset(struct amdgpu_device *adev)
return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA); return SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA);
} }
void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) static void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable)
{ {
u32 def, data; u32 def, data;
...@@ -56,7 +56,7 @@ void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable) ...@@ -56,7 +56,7 @@ void smuio_v9_0_update_rom_clock_gating(struct amdgpu_device *adev, bool enable)
WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data); WREG32_SOC15(SMUIO, 0, mmCGTT_ROM_CLK_CTRL0, data);
} }
void smuio_v9_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags) static void smuio_v9_0_get_clock_gating_state(struct amdgpu_device *adev, u32 *flags)
{ {
u32 data; u32 data;
......
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