Commit 1cd8b21a authored by Alex Deucher's avatar Alex Deucher

drm/radeon/dpm: rework auto performance level enable

Calling force_performance_level() from set_power_state()
doesn't work on some asics because the current power
state pointer has not been properly updated at that point.
Move the calls to force_performance_level() out of the
asic specific set_power_state() functions and into
the main power state sequence.

Fixes dpm resume on SI.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d592fca9
...@@ -2340,12 +2340,6 @@ int btc_dpm_set_power_state(struct radeon_device *rdev) ...@@ -2340,12 +2340,6 @@ int btc_dpm_set_power_state(struct radeon_device *rdev)
return ret; return ret;
} }
ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
if (ret) {
DRM_ERROR("rv770_dpm_force_performance_level failed\n");
return ret;
}
return 0; return 0;
} }
......
...@@ -4748,12 +4748,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev) ...@@ -4748,12 +4748,6 @@ int ci_dpm_set_power_state(struct radeon_device *rdev)
if (pi->pcie_performance_request) if (pi->pcie_performance_request)
ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); ci_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
ret = ci_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
if (ret) {
DRM_ERROR("ci_dpm_force_performance_level failed\n");
return ret;
}
cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX | cik_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC | RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA | RADEON_CG_BLOCK_SDMA |
......
...@@ -2014,12 +2014,6 @@ int cypress_dpm_set_power_state(struct radeon_device *rdev) ...@@ -2014,12 +2014,6 @@ int cypress_dpm_set_power_state(struct radeon_device *rdev)
if (eg_pi->pcie_performance_request) if (eg_pi->pcie_performance_request)
cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps); cypress_notify_link_speed_change_after_state_change(rdev, new_ps, old_ps);
ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
if (ret) {
DRM_ERROR("rv770_dpm_force_performance_level failed\n");
return ret;
}
return 0; return 0;
} }
......
...@@ -1854,7 +1854,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) ...@@ -1854,7 +1854,6 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
RADEON_CG_BLOCK_BIF | RADEON_CG_BLOCK_BIF |
RADEON_CG_BLOCK_HDP), true); RADEON_CG_BLOCK_HDP), true);
rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
return 0; return 0;
} }
......
...@@ -3865,12 +3865,6 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) ...@@ -3865,12 +3865,6 @@ int ni_dpm_set_power_state(struct radeon_device *rdev)
return ret; return ret;
} }
ret = ni_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
if (ret) {
DRM_ERROR("ni_dpm_force_performance_level failed\n");
return ret;
}
return 0; return 0;
} }
......
...@@ -917,10 +917,13 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev) ...@@ -917,10 +917,13 @@ static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
radeon_dpm_post_set_power_state(rdev); radeon_dpm_post_set_power_state(rdev);
/* force low perf level for thermal */ if (rdev->asic->dpm.force_performance_level) {
if (rdev->pm.dpm.thermal_active && if (rdev->pm.dpm.thermal_active)
rdev->asic->dpm.force_performance_level) { /* force low perf level for thermal */
radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW); radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW);
else
/* otherwise, enable auto */
radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
} }
done: done:
...@@ -1149,9 +1152,10 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev) ...@@ -1149,9 +1152,10 @@ static int radeon_pm_init_dpm(struct radeon_device *rdev)
{ {
int ret; int ret;
/* default to performance state */ /* default to balanced state */
rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;
rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
rdev->pm.default_sclk = rdev->clock.default_sclk; rdev->pm.default_sclk = rdev->clock.default_sclk;
rdev->pm.default_mclk = rdev->clock.default_mclk; rdev->pm.default_mclk = rdev->clock.default_mclk;
rdev->pm.current_sclk = rdev->clock.default_sclk; rdev->pm.current_sclk = rdev->clock.default_sclk;
......
...@@ -1758,8 +1758,6 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev) ...@@ -1758,8 +1758,6 @@ int rv6xx_dpm_set_power_state(struct radeon_device *rdev)
rv6xx_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rv6xx_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
return 0; return 0;
} }
......
...@@ -2064,12 +2064,6 @@ int rv770_dpm_set_power_state(struct radeon_device *rdev) ...@@ -2064,12 +2064,6 @@ int rv770_dpm_set_power_state(struct radeon_device *rdev)
rv770_program_dcodt_after_state_switch(rdev, new_ps, old_ps); rv770_program_dcodt_after_state_switch(rdev, new_ps, old_ps);
rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
ret = rv770_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
if (ret) {
DRM_ERROR("rv770_dpm_force_performance_level failed\n");
return ret;
}
return 0; return 0;
} }
......
...@@ -6075,12 +6075,6 @@ int si_dpm_set_power_state(struct radeon_device *rdev) ...@@ -6075,12 +6075,6 @@ int si_dpm_set_power_state(struct radeon_device *rdev)
return ret; return ret;
} }
ret = si_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_AUTO);
if (ret) {
DRM_ERROR("si_dpm_force_performance_level failed\n");
return ret;
}
si_update_cg(rdev, (RADEON_CG_BLOCK_GFX | si_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
RADEON_CG_BLOCK_MC | RADEON_CG_BLOCK_MC |
RADEON_CG_BLOCK_SDMA | RADEON_CG_BLOCK_SDMA |
......
...@@ -1319,8 +1319,6 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev) ...@@ -1319,8 +1319,6 @@ int sumo_dpm_set_power_state(struct radeon_device *rdev)
if (pi->enable_dpm) if (pi->enable_dpm)
sumo_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); sumo_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
return 0; return 0;
} }
......
...@@ -1236,7 +1236,6 @@ int trinity_dpm_set_power_state(struct radeon_device *rdev) ...@@ -1236,7 +1236,6 @@ int trinity_dpm_set_power_state(struct radeon_device *rdev)
trinity_force_level_0(rdev); trinity_force_level_0(rdev);
trinity_unforce_levels(rdev); trinity_unforce_levels(rdev);
trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
} }
trinity_release_mutex(rdev); trinity_release_mutex(rdev);
......
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