Commit 1da6df85 authored by Florian Fainelli's avatar Florian Fainelli Committed by David S. Miller

net: dsa: b53: Implement ARL add/del/dump operations

Adds support for FDB add/delete/dump using the ARL read/write logic and
the ARL search logic for faster dumps. The code is made flexible enough
it could support devices with a different register layout like BCM5325
and BCM5365 which have fewer number of entries or pack values into a
single 64 bits register.
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0830c980
This diff is collapsed.
...@@ -24,6 +24,8 @@ ...@@ -24,6 +24,8 @@
#include <linux/phy.h> #include <linux/phy.h>
#include <net/dsa.h> #include <net/dsa.h>
#include "b53_regs.h"
struct b53_device; struct b53_device;
struct b53_io_ops { struct b53_io_ops {
...@@ -81,6 +83,7 @@ struct b53_device { ...@@ -81,6 +83,7 @@ struct b53_device {
u8 jumbo_pm_reg; u8 jumbo_pm_reg;
u8 jumbo_size_reg; u8 jumbo_size_reg;
int reset_gpio; int reset_gpio;
u8 num_arl_entries;
/* used ports mask */ /* used ports mask */
u16 enabled_ports; u16 enabled_ports;
...@@ -296,6 +299,60 @@ static inline int b53_write64(struct b53_device *dev, u8 page, u8 reg, ...@@ -296,6 +299,60 @@ static inline int b53_write64(struct b53_device *dev, u8 page, u8 reg,
return ret; return ret;
} }
struct b53_arl_entry {
u8 port;
u8 mac[ETH_ALEN];
u16 vid;
u8 is_valid:1;
u8 is_age:1;
u8 is_static:1;
};
static inline void b53_mac_from_u64(u64 src, u8 *dst)
{
unsigned int i;
for (i = 0; i < ETH_ALEN; i++)
dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff;
}
static inline u64 b53_mac_to_u64(const u8 *src)
{
unsigned int i;
u64 dst = 0;
for (i = 0; i < ETH_ALEN; i++)
dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i);
return dst;
}
static inline void b53_arl_to_entry(struct b53_arl_entry *ent,
u64 mac_vid, u32 fwd_entry)
{
memset(ent, 0, sizeof(*ent));
ent->port = fwd_entry & ARLTBL_DATA_PORT_ID_MASK;
ent->is_valid = !!(fwd_entry & ARLTBL_VALID);
ent->is_age = !!(fwd_entry & ARLTBL_AGE);
ent->is_static = !!(fwd_entry & ARLTBL_STATIC);
b53_mac_from_u64(mac_vid, ent->mac);
ent->vid = mac_vid >> ARLTBL_VID_S;
}
static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,
const struct b53_arl_entry *ent)
{
*mac_vid = b53_mac_to_u64(ent->mac);
*mac_vid |= (u64)(ent->vid & ARLTBL_VID_MASK) << ARLTBL_VID_S;
*fwd_entry = ent->port & ARLTBL_DATA_PORT_ID_MASK;
if (ent->is_valid)
*fwd_entry |= ARLTBL_VALID;
if (ent->is_static)
*fwd_entry |= ARLTBL_STATIC;
if (ent->is_age)
*fwd_entry |= ARLTBL_AGE;
}
#ifdef CONFIG_BCM47XX #ifdef CONFIG_BCM47XX
#include <linux/version.h> #include <linux/version.h>
......
...@@ -226,6 +226,70 @@ ...@@ -226,6 +226,70 @@
#define VTE_UNTAG_S 9 #define VTE_UNTAG_S 9
#define VTE_UNTAG (0x1ff << 9) #define VTE_UNTAG (0x1ff << 9)
/*************************************************************************
* ARL I/O Registers
*************************************************************************/
/* ARL Table Read/Write Register (8 bit) */
#define B53_ARLTBL_RW_CTRL 0x00
#define ARLTBL_RW BIT(0)
#define ARLTBL_START_DONE BIT(7)
/* MAC Address Index Register (48 bit) */
#define B53_MAC_ADDR_IDX 0x02
/* VLAN ID Index Register (16 bit) */
#define B53_VLAN_ID_IDX 0x08
/* ARL Table MAC/VID Entry N Registers (64 bit)
*
* BCM5325 and BCM5365 share most definitions below
*/
#define B53_ARLTBL_MAC_VID_ENTRY(n) (0x10 * (n))
#define ARLTBL_MAC_MASK 0xffffffffffff
#define ARLTBL_VID_S 48
#define ARLTBL_VID_MASK_25 0xff
#define ARLTBL_VID_MASK 0xfff
#define ARLTBL_DATA_PORT_ID_S_25 48
#define ARLTBL_DATA_PORT_ID_MASK_25 0xf
#define ARLTBL_AGE_25 BIT(61)
#define ARLTBL_STATIC_25 BIT(62)
#define ARLTBL_VALID_25 BIT(63)
/* ARL Table Data Entry N Registers (32 bit) */
#define B53_ARLTBL_DATA_ENTRY(n) ((0x10 * (n)) + 0x08)
#define ARLTBL_DATA_PORT_ID_MASK 0x1ff
#define ARLTBL_TC(tc) ((3 & tc) << 11)
#define ARLTBL_AGE BIT(14)
#define ARLTBL_STATIC BIT(15)
#define ARLTBL_VALID BIT(16)
/* ARL Search Control Register (8 bit) */
#define B53_ARL_SRCH_CTL 0x50
#define B53_ARL_SRCH_CTL_25 0x20
#define ARL_SRCH_VLID BIT(0)
#define ARL_SRCH_STDN BIT(7)
/* ARL Search Address Register (16 bit) */
#define B53_ARL_SRCH_ADDR 0x51
#define B53_ARL_SRCH_ADDR_25 0x22
#define B53_ARL_SRCH_ADDR_65 0x24
#define ARL_ADDR_MASK GENMASK(14, 0)
/* ARL Search MAC/VID Result (64 bit) */
#define B53_ARL_SRCH_RSTL_0_MACVID 0x60
/* Single register search result on 5325 */
#define B53_ARL_SRCH_RSTL_0_MACVID_25 0x24
/* Single register search result on 5365 */
#define B53_ARL_SRCH_RSTL_0_MACVID_65 0x30
/* ARL Search Data Result (32 bit) */
#define B53_ARL_SRCH_RSTL_0 0x68
#define B53_ARL_SRCH_RSTL_MACVID(x) (B53_ARL_SRCH_RSTL_0_MACVID + ((x) * 0x10))
#define B53_ARL_SRCH_RSTL(x) (B53_ARL_SRCH_RSTL_0 + ((x) * 0x10))
/************************************************************************* /*************************************************************************
* Port VLAN Registers * Port VLAN Registers
*************************************************************************/ *************************************************************************/
......
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