Commit 1dd26c21 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tio_internal.h: replace NITIO_Gi_DMA_Config_Reg()

The "DMA Config" registers are sequential in the enum ni_gpct_register.
Replace this inline CamelCase function with a simple define.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5f19efac
...@@ -413,7 +413,7 @@ void ni_tio_init_counter(struct ni_gpct *counter) ...@@ -413,7 +413,7 @@ void ni_tio_init_counter(struct ni_gpct *counter)
counter_index)); counter_index));
} }
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_DMA_Config_Reg(counter->counter_index), ~0, NITIO_DMA_CFG_REG(counter->counter_index), ~0,
0x0); 0x0);
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index), NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),
......
...@@ -34,21 +34,7 @@ ...@@ -34,21 +34,7 @@
#define NITIO_RESET_REG(x) (NITIO_G01_RESET + ((x) / 2)) #define NITIO_RESET_REG(x) (NITIO_G01_RESET + ((x) / 2))
#define NITIO_STATUS1_REG(x) (NITIO_G01_STATUS1 + ((x) / 2)) #define NITIO_STATUS1_REG(x) (NITIO_G01_STATUS1 + ((x) / 2))
#define NITIO_STATUS2_REG(x) (NITIO_G01_STATUS2 + ((x) / 2)) #define NITIO_STATUS2_REG(x) (NITIO_G01_STATUS2 + ((x) / 2))
#define NITIO_DMA_CFG_REG(x) (NITIO_G0_DMA_CFG + (x))
static inline enum ni_gpct_register NITIO_Gi_DMA_Config_Reg(unsigned idx)
{
switch (idx) {
case 0:
return NITIO_G0_DMA_CFG;
case 1:
return NITIO_G1_DMA_CFG;
case 2:
return NITIO_G2_DMA_CFG;
case 3:
return NITIO_G3_DMA_CFG;
}
return 0;
}
static inline enum ni_gpct_register NITIO_Gi_DMA_Status_Reg(unsigned idx) static inline enum ni_gpct_register NITIO_Gi_DMA_Status_Reg(unsigned idx)
{ {
......
...@@ -84,7 +84,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable, ...@@ -84,7 +84,7 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
if (read_not_write == 0) if (read_not_write == 0)
gi_dma_config_bits |= Gi_DMA_Write_Bit; gi_dma_config_bits |= Gi_DMA_Write_Bit;
ni_tio_set_bits(counter, ni_tio_set_bits(counter,
NITIO_Gi_DMA_Config_Reg(counter-> NITIO_DMA_CFG_REG(counter->
counter_index), counter_index),
Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit | Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit |
Gi_DMA_Write_Bit, gi_dma_config_bits); Gi_DMA_Write_Bit, gi_dma_config_bits);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment