Commit 1f1d5b74 authored by Russell King's avatar Russell King

ARM: outer cache: add WARN_ON() to outer_disable()

Add WARN_ON() conditions to outer_disable() to ensure that its
requirements aren't violated.
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent bc4f94d8
......@@ -96,11 +96,7 @@ static inline void outer_flush_all(void)
* cache is pushed out to lower levels of system memory. The note and
* conditions above concerning outer_flush_all() applies here.
*/
static inline void outer_disable(void)
{
if (outer_cache.disable)
outer_cache.disable();
}
extern void outer_disable(void);
/**
* outer_resume - restore the cache configuration and re-enable outer cache
......
......@@ -95,6 +95,7 @@ obj-$(CONFIG_CPU_V7M) += proc-v7m.o
AFLAGS_proc-v6.o :=-Wa,-march=armv6
AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o
......
/*
* Copyright (C) 2010 ARM Ltd.
* Written by Catalin Marinas <catalin.marinas@arm.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/bug.h>
#include <linux/smp.h>
#include <asm/outercache.h>
void outer_disable(void)
{
WARN_ON(!irqs_disabled());
WARN_ON(num_online_cpus() > 1);
if (outer_cache.disable)
outer_cache.disable();
}
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