Commit 1f33446d authored by Stafford Horne's avatar Stafford Horne

openrisc: Add FPU config

Allow disabling FPU related code sequences to save space.
Signed-off-by: default avatarStafford Horne <shorne@gmail.com>
parent c88cfb5c
...@@ -188,6 +188,15 @@ config SMP ...@@ -188,6 +188,15 @@ config SMP
If you don't know what to do here, say N. If you don't know what to do here, say N.
config FPU
bool "FPU support"
default y
help
Say N here if you want to disable all floating-point related procedures
in the kernel and reduce binary size.
If you don't know what to do here, say Y.
source "kernel/Kconfig.hz" source "kernel/Kconfig.hz"
config OPENRISC_NO_SPR_SR_DSX config OPENRISC_NO_SPR_SR_DSX
......
...@@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target, ...@@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target,
return ret; return ret;
} }
#ifdef CONFIG_FPU
/* /*
* As OpenRISC shares GPRs and floating point registers we don't need to export * As OpenRISC shares GPRs and floating point registers we don't need to export
* the floating point registers again. So here we only export the fpcsr special * the floating point registers again. So here we only export the fpcsr special
...@@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target, ...@@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target,
&regs->fpcsr, 0, 4); &regs->fpcsr, 0, 4);
return ret; return ret;
} }
#endif
/* /*
* Define the register sets available on OpenRISC under Linux * Define the register sets available on OpenRISC under Linux
*/ */
enum or1k_regset { enum or1k_regset {
REGSET_GENERAL, REGSET_GENERAL,
#ifdef CONFIG_FPU
REGSET_FPU, REGSET_FPU,
#endif
}; };
static const struct user_regset or1k_regsets[] = { static const struct user_regset or1k_regsets[] = {
...@@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = { ...@@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = {
.regset_get = genregs_get, .regset_get = genregs_get,
.set = genregs_set, .set = genregs_set,
}, },
#ifdef CONFIG_FPU
[REGSET_FPU] = { [REGSET_FPU] = {
.core_note_type = NT_PRFPREG, .core_note_type = NT_PRFPREG,
.n = sizeof(struct __or1k_fpu_state) / sizeof(long), .n = sizeof(struct __or1k_fpu_state) / sizeof(long),
...@@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = { ...@@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = {
.regset_get = fpregs_get, .regset_get = fpregs_get,
.set = fpregs_set, .set = fpregs_set,
}, },
#endif
}; };
static const struct user_regset_view user_or1k_native_view = { static const struct user_regset_view user_or1k_native_view = {
......
...@@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) ...@@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)
{ {
if (user_mode(regs)) { if (user_mode(regs)) {
int code = FPE_FLTUNK; int code = FPE_FLTUNK;
#ifdef CONFIG_FPU
unsigned long fpcsr = regs->fpcsr; unsigned long fpcsr = regs->fpcsr;
if (fpcsr & SPR_FPCSR_IVF) if (fpcsr & SPR_FPCSR_IVF)
...@@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) ...@@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address)
/* Clear all flags */ /* Clear all flags */
regs->fpcsr &= ~SPR_FPCSR_ALLF; regs->fpcsr &= ~SPR_FPCSR_ALLF;
#endif
force_sig_fault(SIGFPE, code, (void __user *)regs->pc); force_sig_fault(SIGFPE, code, (void __user *)regs->pc);
} else { } else {
pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc); pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc);
......
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