Commit 20eb4354 authored by Bartosz Golaszewski's avatar Bartosz Golaszewski Committed by Sekhar Nori

ARM: davinci: dm365: switch to using the clocksource driver

We now have a proper clocksource driver for davinci. Switch the dm365
platform to using it.
Signed-off-by: default avatarBartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: default avatarDavid Lechner <david@lechnology.com>
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
parent cea931c2
...@@ -35,7 +35,8 @@ ...@@ -35,7 +35,8 @@
#include <mach/cputype.h> #include <mach/cputype.h>
#include <mach/mux.h> #include <mach/mux.h>
#include <mach/serial.h> #include <mach/serial.h>
#include <mach/time.h>
#include <clocksource/timer-davinci.h>
#include "asp.h" #include "asp.h"
#include "davinci.h" #include "davinci.h"
...@@ -660,10 +661,16 @@ static struct davinci_id dm365_ids[] = { ...@@ -660,10 +661,16 @@ static struct davinci_id dm365_ids[] = {
}, },
}; };
static struct davinci_timer_info dm365_timer_info = { /*
.timers = davinci_timer_instance, * Bottom half of timer0 is used for clockevent, top half is used for
.clockevent_id = T0_BOT, * clocksource.
.clocksource_id = T0_TOP, */
static const struct davinci_timer_cfg dm365_timer_cfg = {
.reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_128),
.irq = {
DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)),
DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)),
},
}; };
#define DM365_UART1_BASE (IO_PHYS + 0x106000) #define DM365_UART1_BASE (IO_PHYS + 0x106000)
...@@ -723,7 +730,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = { ...@@ -723,7 +730,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE, .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm365_pins, .pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins), .pinmux_pins_num = ARRAY_SIZE(dm365_pins),
.timer_info = &dm365_timer_info,
.emac_pdata = &dm365_emac_pdata, .emac_pdata = &dm365_emac_pdata,
.sram_dma = 0x00010000, .sram_dma = 0x00010000,
.sram_len = SZ_32K, .sram_len = SZ_32K,
...@@ -771,6 +777,7 @@ void __init dm365_init_time(void) ...@@ -771,6 +777,7 @@ void __init dm365_init_time(void)
{ {
void __iomem *pll1, *pll2, *psc; void __iomem *pll1, *pll2, *psc;
struct clk *clk; struct clk *clk;
int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ); clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM365_REF_FREQ);
...@@ -789,7 +796,8 @@ void __init dm365_init_time(void) ...@@ -789,7 +796,8 @@ void __init dm365_init_time(void)
return; return;
} }
davinci_timer_init(clk); rv = davinci_timer_register(clk, &dm365_timer_cfg);
WARN(rv, "Unable to register the timer: %d\n", rv);
} }
void __init dm365_register_clocks(void) void __init dm365_register_clocks(void)
......
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