Commit 21203e09 authored by Jeremy Kerr's avatar Jeremy Kerr Committed by Alexandre Belloni

dt-bindings: i3c: Add AST2600 i3c controller

Add a devicetree binding for the ast2600 i3c controller hardware. This
is heavily based on the designware i3c core, plus a reset facility
and two platform-specific properties:

 - sda-pullup-ohms: to specify the value of the configurable pullup
   resistors on the SDA line

 - aspeed,global-regs: to reference the (ast2600-specific) i3c global
   register block, and the device index to use within it.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> (on v1)
Signed-off-by: default avatarJeremy Kerr <jk@codeconstruct.com.au>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230331091501.3800299-3-jk@codeconstruct.com.auSigned-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent d782188c
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ASPEED AST2600 i3c controller
maintainers:
- Jeremy Kerr <jk@codeconstruct.com.au>
allOf:
- $ref: i3c.yaml#
properties:
compatible:
const: aspeed,ast2600-i3c
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
interrupts:
maxItems: 1
sda-pullup-ohms:
enum: [545, 750, 2000]
default: 2000
description: |
Value to configure SDA pullup resistor, in Ohms.
aspeed,global-regs:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to i3c global register syscon node
- description: index of this i3c controller in the global register set
description: |
A (phandle, controller index) reference to the i3c global register set
used for this device.
required:
- compatible
- reg
- clocks
- interrupts
- aspeed,global-regs
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
i3c-master@2000 {
compatible = "aspeed,ast2600-i3c";
reg = <0x2000 0x1000>;
#address-cells = <3>;
#size-cells = <0>;
clocks = <&syscon 0>;
resets = <&syscon 0>;
aspeed,global-regs = <&i3c_global 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i3c1_default>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
};
...
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