Commit 21832537 authored by Ran Wang's avatar Ran Wang Committed by Li Yang

dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition

By default, QorIQ SoC's RCPM register block is Big Endian. But
there are some exceptions, such as LS1088A and LS2088A, are
Little Endian. So add this optional property to help identify
them.

Actually LS2021A and other Layerscapes won't totally follow Chassis
2.1, so separate them from powerpc SoC.
Signed-off-by: default avatarRan Wang <ran.wang_1@nxp.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLi Yang <leoyang.li@nxp.com>
parent b4941adb
...@@ -5,7 +5,7 @@ and power management. ...@@ -5,7 +5,7 @@ and power management.
Required properites: Required properites:
- reg : Offset and length of the register set of the RCPM block. - reg : Offset and length of the register set of the RCPM block.
- fsl,#rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the - #fsl,rcpm-wakeup-cells : The number of IPPDEXPCR register cells in the
fsl,rcpm-wakeup property. fsl,rcpm-wakeup property.
- compatible : Must contain a chip-specific RCPM block compatible string - compatible : Must contain a chip-specific RCPM block compatible string
and (if applicable) may contain a chassis-version RCPM compatible and (if applicable) may contain a chassis-version RCPM compatible
...@@ -20,6 +20,7 @@ Required properites: ...@@ -20,6 +20,7 @@ Required properites:
* "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
* "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
* "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
* "fsl,qoriq-rcpm-2.1+": for chassis 2.1+ rcpm
All references to "1.0" and "2.0" refer to the QorIQ chassis version to All references to "1.0" and "2.0" refer to the QorIQ chassis version to
which the chip complies. which the chip complies.
...@@ -27,14 +28,19 @@ Chassis Version Example Chips ...@@ -27,14 +28,19 @@ Chassis Version Example Chips
--------------- ------------------------------- --------------- -------------------------------
1.0 p4080, p5020, p5040, p2041, p3041 1.0 p4080, p5020, p5040, p2041, p3041
2.0 t4240, b4860, b4420 2.0 t4240, b4860, b4420
2.1 t1040, ls1021 2.1 t1040,
2.1+ ls1021a, ls1012a, ls1043a, ls1046a
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
Example: Example:
The RCPM node for T4240: The RCPM node for T4240:
rcpm: global-utilities@e2000 { rcpm: global-utilities@e2000 {
compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0"; compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
reg = <0xe2000 0x1000>; reg = <0xe2000 0x1000>;
fsl,#rcpm-wakeup-cells = <2>; #fsl,rcpm-wakeup-cells = <2>;
}; };
* Freescale RCPM Wakeup Source Device Tree Bindings * Freescale RCPM Wakeup Source Device Tree Bindings
...@@ -44,7 +50,7 @@ can be used as a wakeup source. ...@@ -44,7 +50,7 @@ can be used as a wakeup source.
- fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR - fsl,rcpm-wakeup: Consists of a phandle to the rcpm node and the IPPDEXPCR
register cells. The number of IPPDEXPCR register cells is defined in register cells. The number of IPPDEXPCR register cells is defined in
"fsl,#rcpm-wakeup-cells" in the rcpm node. The first register cell is "#fsl,rcpm-wakeup-cells" in the rcpm node. The first register cell is
the bit mask that should be set in IPPDEXPCR0, and the second register the bit mask that should be set in IPPDEXPCR0, and the second register
cell is for IPPDEXPCR1, and so on. cell is for IPPDEXPCR1, and so on.
......
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