Commit 21e938d0 authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/ltc/ga102: initial support

v2. fixup for ga103 early merge
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
parent 4b569ded
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
#include <core/subdev.h> #include <core/subdev.h>
#include <core/mm.h> #include <core/mm.h>
#define NVKM_LTC_MAX_ZBC_COLOR_CNT 16 #define NVKM_LTC_MAX_ZBC_COLOR_CNT 32
#define NVKM_LTC_MAX_ZBC_DEPTH_CNT 16 #define NVKM_LTC_MAX_ZBC_DEPTH_CNT 16
struct nvkm_ltc { struct nvkm_ltc {
...@@ -44,4 +44,5 @@ int gm200_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct ...@@ -44,4 +44,5 @@ int gm200_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct
int gp100_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **); int gp100_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **);
int gp102_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **); int gp102_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **);
int gp10b_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **); int gp10b_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **);
int ga102_ltc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_ltc **);
#endif #endif
...@@ -2606,6 +2606,7 @@ nv172_chipset = { ...@@ -2606,6 +2606,7 @@ nv172_chipset = {
.gsp = { 0x00000001, ga102_gsp_new }, .gsp = { 0x00000001, ga102_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new }, .i2c = { 0x00000001, gm200_i2c_new },
.imem = { 0x00000001, nv50_instmem_new }, .imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, ga102_ltc_new },
.mc = { 0x00000001, ga100_mc_new }, .mc = { 0x00000001, ga100_mc_new },
.mmu = { 0x00000001, tu102_mmu_new }, .mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new }, .pci = { 0x00000001, gp100_pci_new },
...@@ -2634,6 +2635,7 @@ nv173_chipset = { ...@@ -2634,6 +2635,7 @@ nv173_chipset = {
.gsp = { 0x00000001, ga102_gsp_new }, .gsp = { 0x00000001, ga102_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new }, .i2c = { 0x00000001, gm200_i2c_new },
.imem = { 0x00000001, nv50_instmem_new }, .imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, ga102_ltc_new },
.mc = { 0x00000001, ga100_mc_new }, .mc = { 0x00000001, ga100_mc_new },
.mmu = { 0x00000001, tu102_mmu_new }, .mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new }, .pci = { 0x00000001, gp100_pci_new },
...@@ -2662,6 +2664,7 @@ nv174_chipset = { ...@@ -2662,6 +2664,7 @@ nv174_chipset = {
.gsp = { 0x00000001, ga102_gsp_new }, .gsp = { 0x00000001, ga102_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new }, .i2c = { 0x00000001, gm200_i2c_new },
.imem = { 0x00000001, nv50_instmem_new }, .imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, ga102_ltc_new },
.mc = { 0x00000001, ga100_mc_new }, .mc = { 0x00000001, ga100_mc_new },
.mmu = { 0x00000001, tu102_mmu_new }, .mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new }, .pci = { 0x00000001, gp100_pci_new },
...@@ -2690,6 +2693,7 @@ nv176_chipset = { ...@@ -2690,6 +2693,7 @@ nv176_chipset = {
.gsp = { 0x00000001, ga102_gsp_new }, .gsp = { 0x00000001, ga102_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new }, .i2c = { 0x00000001, gm200_i2c_new },
.imem = { 0x00000001, nv50_instmem_new }, .imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, ga102_ltc_new },
.mc = { 0x00000001, ga100_mc_new }, .mc = { 0x00000001, ga100_mc_new },
.mmu = { 0x00000001, tu102_mmu_new }, .mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new }, .pci = { 0x00000001, gp100_pci_new },
...@@ -2718,6 +2722,7 @@ nv177_chipset = { ...@@ -2718,6 +2722,7 @@ nv177_chipset = {
.gsp = { 0x00000001, ga102_gsp_new }, .gsp = { 0x00000001, ga102_gsp_new },
.i2c = { 0x00000001, gm200_i2c_new }, .i2c = { 0x00000001, gm200_i2c_new },
.imem = { 0x00000001, nv50_instmem_new }, .imem = { 0x00000001, nv50_instmem_new },
.ltc = { 0x00000001, ga102_ltc_new },
.mc = { 0x00000001, ga100_mc_new }, .mc = { 0x00000001, ga100_mc_new },
.mmu = { 0x00000001, tu102_mmu_new }, .mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new }, .pci = { 0x00000001, gp100_pci_new },
......
...@@ -7,3 +7,4 @@ nvkm-y += nvkm/subdev/ltc/gm200.o ...@@ -7,3 +7,4 @@ nvkm-y += nvkm/subdev/ltc/gm200.o
nvkm-y += nvkm/subdev/ltc/gp100.o nvkm-y += nvkm/subdev/ltc/gp100.o
nvkm-y += nvkm/subdev/ltc/gp102.o nvkm-y += nvkm/subdev/ltc/gp102.o
nvkm-y += nvkm/subdev/ltc/gp10b.o nvkm-y += nvkm/subdev/ltc/gp10b.o
nvkm-y += nvkm/subdev/ltc/ga102.o
/*
* Copyright 2021 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "priv.h"
static void
ga102_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4])
{
struct nvkm_device *device = ltc->subdev.device;
nvkm_mask(device, 0x17e338, 0x0000001f, i);
nvkm_wr32(device, 0x17e33c, color[0]);
nvkm_wr32(device, 0x17e340, color[1]);
nvkm_wr32(device, 0x17e344, color[2]);
nvkm_wr32(device, 0x17e348, color[3]);
}
static const struct nvkm_ltc_func
ga102_ltc = {
.oneinit = gp100_ltc_oneinit,
.init = gp100_ltc_init,
.intr = gp100_ltc_intr,
.cbc_clear = gm107_ltc_cbc_clear,
.cbc_wait = gm107_ltc_cbc_wait,
.zbc_color = 31,
.zbc_depth = 16,
.zbc_clear_color = ga102_ltc_zbc_clear_color,
.zbc_clear_depth = gm107_ltc_zbc_clear_depth,
.zbc_clear_stencil = gp102_ltc_zbc_clear_stencil,
.invalidate = gf100_ltc_invalidate,
.flush = gf100_ltc_flush,
};
int
ga102_ltc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_ltc **pltc)
{
return nvkm_ltc_new_(&ga102_ltc, device, type, inst, pltc);
}
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment