Commit 21fb8da6 authored by Avraham Stern's avatar Avraham Stern Committed by Johannes Berg

wifi: iwlwifi: mvm: read synced time from firmware if supported

If the firmware supports reading synced GP2/ATRB timestamps,
read the synced timestamps from firmware instead of reading the
GP2 register and the system time separately. Reading the synced
time from firmware should be more accurate.
Signed-off-by: default avatarAvraham Stern <avraham.stern@intel.com>
Signed-off-by: default avatarGregory Greenman <gregory.greenman@intel.com>
Link: https://lore.kernel.org/r/20230320122330.a6be5f0b5580.Idedb496a5943fa496143066ffbed08185a8c4582@changeidSigned-off-by: default avatarJohannes Berg <johannes.berg@intel.com>
parent 1595ecce
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/*
* Copyright (C) 2012-2014, 2018-2020 Intel Corporation
* Copyright (C) 2012-2014, 2018-2022 Intel Corporation
* Copyright (C) 2013-2015 Intel Mobile Communications GmbH
* Copyright (C) 2016-2017 Intel Deutschland GmbH
*/
......@@ -26,6 +26,11 @@ enum iwl_data_path_subcmd_ids {
*/
TRIGGER_RX_QUEUES_NOTIF_CMD = 0x2,
/**
* @WNM_PLATFORM_PTM_REQUEST_CMD: &struct iwl_time_sync_cfg_cmd
*/
WNM_PLATFORM_PTM_REQUEST_CMD = 0x3,
/**
* @STA_HE_CTXT_CMD: &struct iwl_he_sta_context_cmd
*/
......@@ -146,6 +151,48 @@ enum iwl_channel_estimation_flags {
IWL_CHANNEL_ESTIMATION_COUNTER = BIT(2),
};
/**
* enum iwl_synced_time_operation - PTM request options
*
* @IWL_SYNCED_TIME_OPERATION_READ_ARTB: read only the ARTB time
* @IWL_SYNCED_TIME_OPERATION_READ_GP2: read only the GP2 time
* @IWL_SYNCED_TIME_OPERATION_READ_BOTH: latch the ARTB and GP2 clocks and
* provide timestamps from both clocks for the same time point
*/
enum iwl_synced_time_operation {
IWL_SYNCED_TIME_OPERATION_READ_ARTB = 1,
IWL_SYNCED_TIME_OPERATION_READ_GP2,
IWL_SYNCED_TIME_OPERATION_READ_BOTH,
};
/**
* struct iwl_synced_time_cmd - request synced GP2/ARTB timestamps
*
* @operation: one of &enum iwl_synced_time_operation
*/
struct iwl_synced_time_cmd {
__le32 operation;
} __packed; /* WNM_80211V_TIMING_CMD_API_S_VER_1 */
/**
* struct iwl_synced_time_rsp - response to iwl_synced_time_cmd
*
* @operation: one of &enum iwl_synced_time_operation
* @platform_timestamp_hi: high DWORD of the ARTB clock timestamp in nanoseconds
* @platform_timestamp_lo: low DWORD of the ARTB clock timestamp in nanoseconds
* @gp2_timestamp_hi: high DWORD of the GP2 clock timestamp in 10's of
* nanoseconds
* @gp2_timestamp_lo: low DWORD of the GP2 clock timestamp in 10's of
* nanoseconds
*/
struct iwl_synced_time_rsp {
__le32 operation;
__le32 platform_timestamp_hi;
__le32 platform_timestamp_lo;
__le32 gp2_timestamp_hi;
__le32 gp2_timestamp_lo;
} __packed; /* WNM_80211V_TIMING_RSP_API_S_VER_1 */
/**
* struct iwl_channel_estimation_cfg - channel estimation reporting config
*/
......
......@@ -455,6 +455,7 @@ enum iwl_ucode_tlv_capa {
IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,
IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,
IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105,
IWL_UCODE_TLV_CAPA_SYNCED_TIME = (__force iwl_ucode_tlv_capa_t)106,
#ifdef __CHECKER__
/* sparse says it cannot increment the previous enum member */
......
......@@ -23,12 +23,54 @@ static void iwl_mvm_ptp_update_new_read(struct iwl_mvm *mvm, u32 gp2)
schedule_delayed_work(&mvm->ptp_data.dwork, IWL_PTP_WRAP_TIME);
}
static int
iwl_mvm_get_crosstimestamp_fw(struct iwl_mvm *mvm, u32 *gp2, u64 *sys_time)
{
struct iwl_synced_time_cmd synced_time_cmd = {
.operation = cpu_to_le32(IWL_SYNCED_TIME_OPERATION_READ_BOTH)
};
struct iwl_host_cmd cmd = {
.id = WIDE_ID(DATA_PATH_GROUP, WNM_PLATFORM_PTM_REQUEST_CMD),
.flags = CMD_WANT_SKB,
.data[0] = &synced_time_cmd,
.len[0] = sizeof(synced_time_cmd),
};
struct iwl_synced_time_rsp *resp;
struct iwl_rx_packet *pkt;
int ret;
u64 gp2_10ns;
ret = iwl_mvm_send_cmd(mvm, &cmd);
if (ret)
return ret;
pkt = cmd.resp_pkt;
if (iwl_rx_packet_payload_len(pkt) != sizeof(*resp)) {
IWL_ERR(mvm, "PTP: Invalid command response\n");
iwl_free_resp(&cmd);
return -EIO;
}
resp = (void *)pkt->data;
gp2_10ns = (u64)le32_to_cpu(resp->gp2_timestamp_hi) << 32 |
le32_to_cpu(resp->gp2_timestamp_lo);
*gp2 = gp2_10ns / 100;
*sys_time = (u64)le32_to_cpu(resp->platform_timestamp_hi) << 32 |
le32_to_cpu(resp->platform_timestamp_lo);
return ret;
}
static int
iwl_mvm_phc_get_crosstimestamp(struct ptp_clock_info *ptp,
struct system_device_crosststamp *xtstamp)
{
struct iwl_mvm *mvm = container_of(ptp, struct iwl_mvm,
ptp_data.ptp_clock_info);
int ret = 0;
/* Raw value read from GP2 register in usec */
u32 gp2;
/* GP2 value in ns*/
......@@ -43,7 +85,16 @@ iwl_mvm_phc_get_crosstimestamp(struct ptp_clock_info *ptp,
return -ENODEV;
}
iwl_mvm_get_sync_time(mvm, CLOCK_REALTIME, &gp2, NULL, &sys_time);
mutex_lock(&mvm->mutex);
if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SYNCED_TIME)) {
ret = iwl_mvm_get_crosstimestamp_fw(mvm, &gp2, &sys_time);
if (ret)
goto out;
} else {
iwl_mvm_get_sync_time(mvm, CLOCK_REALTIME, &gp2, NULL,
&sys_time);
}
iwl_mvm_ptp_update_new_read(mvm, gp2);
......@@ -57,7 +108,9 @@ iwl_mvm_phc_get_crosstimestamp(struct ptp_clock_info *ptp,
xtstamp->device = (ktime_t)gp2_ns;
xtstamp->sys_realtime = sys_time;
return 0;
out:
mutex_unlock(&mvm->mutex);
return ret;
}
static void iwl_mvm_ptp_work(struct work_struct *wk)
......
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