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Commit 226afe68 authored by Joe Perches's avatar Joe Perches Committed by John W. Linville
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ath: Convert ath_print to ath_dbg 

Remove ath/debug.h and the includes of these files.
Coalesce long formats.
Correct a few misspellings and missing "\n"s from these logging messages.
Remove unnecessary trailing space before a newline.
Remove ARRAY_SIZE casts, use printf type %zu
Signed-off-by: default avatarJoe Perches <joe@perches.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 3800276a
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Inline Side-by-side
Showing with 1009 additions and 1105 deletions
drivers/net/wireless/ath/ath5k/base.c
View file @ 226afe68
...@@ -60,7 +60,6 @@ ...@@ -60,7 +60,6 @@
#include "reg.h" #include "reg.h"
#include "debug.h" #include "debug.h"
#include "ani.h" #include "ani.h"
#include "../debug.h"
static int modparam_nohwcrypt; static int modparam_nohwcrypt;
module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
......
drivers/net/wireless/ath/ath5k/debug.c
View file @ 226afe68
...@@ -60,7 +60,6 @@ ...@@ -60,7 +60,6 @@
#include "base.h" #include "base.h"
#include "debug.h" #include "debug.h"
#include "../debug.h"
static unsigned int ath5k_debug; static unsigned int ath5k_debug;
module_param_named(debug, ath5k_debug, uint, 0); module_param_named(debug, ath5k_debug, uint, 0);
......
drivers/net/wireless/ath/ath9k/ani.c
View file @ 226afe68
...@@ -135,8 +135,8 @@ static void ath9k_ani_restart(struct ath_hw *ah) ...@@ -135,8 +135,8 @@ static void ath9k_ani_restart(struct ath_hw *ah)
cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high; cck_base = AR_PHY_COUNTMAX - ah->config.cck_trig_high;
} }
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Writing ofdmbase=%u cckbase=%u\n", ofdm_base, cck_base); "Writing ofdmbase=%u cckbase=%u\n", ofdm_base, cck_base);
ENABLE_REGWRITE_BUFFER(ah); ENABLE_REGWRITE_BUFFER(ah);
...@@ -267,11 +267,11 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel) ...@@ -267,11 +267,11 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel)
aniState->noiseFloor = BEACON_RSSI(ah); aniState->noiseFloor = BEACON_RSSI(ah);
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n", "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
aniState->ofdmNoiseImmunityLevel, aniState->ofdmNoiseImmunityLevel,
immunityLevel, aniState->noiseFloor, immunityLevel, aniState->noiseFloor,
aniState->rssiThrLow, aniState->rssiThrHigh); aniState->rssiThrLow, aniState->rssiThrHigh);
aniState->ofdmNoiseImmunityLevel = immunityLevel; aniState->ofdmNoiseImmunityLevel = immunityLevel;
...@@ -334,11 +334,11 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel) ...@@ -334,11 +334,11 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel)
const struct ani_cck_level_entry *entry_cck; const struct ani_cck_level_entry *entry_cck;
aniState->noiseFloor = BEACON_RSSI(ah); aniState->noiseFloor = BEACON_RSSI(ah);
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n", "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
aniState->cckNoiseImmunityLevel, immunityLevel, aniState->cckNoiseImmunityLevel, immunityLevel,
aniState->noiseFloor, aniState->rssiThrLow, aniState->noiseFloor, aniState->rssiThrLow,
aniState->rssiThrHigh); aniState->rssiThrHigh);
if ((ah->opmode == NL80211_IFTYPE_STATION || if ((ah->opmode == NL80211_IFTYPE_STATION ||
ah->opmode == NL80211_IFTYPE_ADHOC) && ah->opmode == NL80211_IFTYPE_ADHOC) &&
...@@ -478,8 +478,8 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning) ...@@ -478,8 +478,8 @@ static void ath9k_ani_reset_old(struct ath_hw *ah, bool is_scanning)
if (ah->opmode != NL80211_IFTYPE_STATION if (ah->opmode != NL80211_IFTYPE_STATION
&& ah->opmode != NL80211_IFTYPE_ADHOC) { && ah->opmode != NL80211_IFTYPE_ADHOC) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Reset ANI state opmode %u\n", ah->opmode); "Reset ANI state opmode %u\n", ah->opmode);
ah->stats.ast_ani_reset++; ah->stats.ast_ani_reset++;
if (ah->opmode == NL80211_IFTYPE_AP) { if (ah->opmode == NL80211_IFTYPE_AP) {
...@@ -584,16 +584,14 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) ...@@ -584,16 +584,14 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
ATH9K_ANI_OFDM_DEF_LEVEL || ATH9K_ANI_OFDM_DEF_LEVEL ||
aniState->cckNoiseImmunityLevel != aniState->cckNoiseImmunityLevel !=
ATH9K_ANI_CCK_DEF_LEVEL) { ATH9K_ANI_CCK_DEF_LEVEL) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Restore defaults: opmode %u " "Restore defaults: opmode %u chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
"chan %d Mhz/0x%x is_scanning=%d " ah->opmode,
"ofdm:%d cck:%d\n", chan->channel,
ah->opmode, chan->channelFlags,
chan->channel, is_scanning,
chan->channelFlags, aniState->ofdmNoiseImmunityLevel,
is_scanning, aniState->cckNoiseImmunityLevel);
aniState->ofdmNoiseImmunityLevel,
aniState->cckNoiseImmunityLevel);
ath9k_hw_set_ofdm_nil(ah, ATH9K_ANI_OFDM_DEF_LEVEL); ath9k_hw_set_ofdm_nil(ah, ATH9K_ANI_OFDM_DEF_LEVEL);
ath9k_hw_set_cck_nil(ah, ATH9K_ANI_CCK_DEF_LEVEL); ath9k_hw_set_cck_nil(ah, ATH9K_ANI_CCK_DEF_LEVEL);
...@@ -602,16 +600,14 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning) ...@@ -602,16 +600,14 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning)
/* /*
* restore historical levels for this channel * restore historical levels for this channel
*/ */
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Restore history: opmode %u " "Restore history: opmode %u chan %d Mhz/0x%x is_scanning=%d ofdm:%d cck:%d\n",
"chan %d Mhz/0x%x is_scanning=%d " ah->opmode,
"ofdm:%d cck:%d\n", chan->channel,
ah->opmode, chan->channelFlags,
chan->channel, is_scanning,
chan->channelFlags, aniState->ofdmNoiseImmunityLevel,
is_scanning, aniState->cckNoiseImmunityLevel);
aniState->ofdmNoiseImmunityLevel,
aniState->cckNoiseImmunityLevel);
ath9k_hw_set_ofdm_nil(ah, ath9k_hw_set_ofdm_nil(ah,
aniState->ofdmNoiseImmunityLevel); aniState->ofdmNoiseImmunityLevel);
...@@ -666,19 +662,17 @@ static bool ath9k_hw_ani_read_counters(struct ath_hw *ah) ...@@ -666,19 +662,17 @@ static bool ath9k_hw_ani_read_counters(struct ath_hw *ah)
if (!use_new_ani(ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) { if (!use_new_ani(ah) && (phyCnt1 < ofdm_base || phyCnt2 < cck_base)) {
if (phyCnt1 < ofdm_base) { if (phyCnt1 < ofdm_base) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"phyCnt1 0x%x, resetting " "phyCnt1 0x%x, resetting counter value to 0x%x\n",
"counter value to 0x%x\n", phyCnt1, ofdm_base);
phyCnt1, ofdm_base);
REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base); REG_WRITE(ah, AR_PHY_ERR_1, ofdm_base);
REG_WRITE(ah, AR_PHY_ERR_MASK_1, REG_WRITE(ah, AR_PHY_ERR_MASK_1,
AR_PHY_ERR_OFDM_TIMING); AR_PHY_ERR_OFDM_TIMING);
} }
if (phyCnt2 < cck_base) { if (phyCnt2 < cck_base) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"phyCnt2 0x%x, resetting " "phyCnt2 0x%x, resetting counter value to 0x%x\n",
"counter value to 0x%x\n", phyCnt2, cck_base);
phyCnt2, cck_base);
REG_WRITE(ah, AR_PHY_ERR_2, cck_base); REG_WRITE(ah, AR_PHY_ERR_2, cck_base);
REG_WRITE(ah, AR_PHY_ERR_MASK_2, REG_WRITE(ah, AR_PHY_ERR_MASK_2,
AR_PHY_ERR_CCK_TIMING); AR_PHY_ERR_CCK_TIMING);
...@@ -719,13 +713,12 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -719,13 +713,12 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)
cckPhyErrRate = aniState->cckPhyErrCount * 1000 / cckPhyErrRate = aniState->cckPhyErrCount * 1000 /
aniState->listenTime; aniState->listenTime;
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"listenTime=%d OFDM:%d errs=%d/s CCK:%d " "listenTime=%d OFDM:%d errs=%d/s CCK:%d errs=%d/s ofdm_turn=%d\n",
"errs=%d/s ofdm_turn=%d\n", aniState->listenTime,
aniState->listenTime, aniState->ofdmNoiseImmunityLevel,
aniState->ofdmNoiseImmunityLevel, ofdmPhyErrRate, aniState->cckNoiseImmunityLevel,
ofdmPhyErrRate, aniState->cckNoiseImmunityLevel, cckPhyErrRate, aniState->ofdmsTurn);
cckPhyErrRate, aniState->ofdmsTurn);
if (aniState->listenTime > 5 * ah->aniperiod) { if (aniState->listenTime > 5 * ah->aniperiod) {
if (ofdmPhyErrRate <= ah->config.ofdm_trig_low && if (ofdmPhyErrRate <= ah->config.ofdm_trig_low &&
...@@ -755,7 +748,7 @@ void ath9k_enable_mib_counters(struct ath_hw *ah) ...@@ -755,7 +748,7 @@ void ath9k_enable_mib_counters(struct ath_hw *ah)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
ath_print(common, ATH_DBG_ANI, "Enable MIB counters\n"); ath_dbg(common, ATH_DBG_ANI, "Enable MIB counters\n");
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
...@@ -777,7 +770,7 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah) ...@@ -777,7 +770,7 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
ath_print(common, ATH_DBG_ANI, "Disable MIB counters\n"); ath_dbg(common, ATH_DBG_ANI, "Disable MIB counters\n");
REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
...@@ -852,7 +845,7 @@ void ath9k_hw_ani_init(struct ath_hw *ah) ...@@ -852,7 +845,7 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
int i; int i;
ath_print(common, ATH_DBG_ANI, "Initialize ANI\n"); ath_dbg(common, ATH_DBG_ANI, "Initialize ANI\n");
if (use_new_ani(ah)) { if (use_new_ani(ah)) {
ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_NEW; ah->config.ofdm_trig_high = ATH9K_ANI_OFDM_TRIG_HIGH_NEW;
......
drivers/net/wireless/ath/ath9k/ar5008_phy.c
View file @ 226afe68
...@@ -130,9 +130,8 @@ static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq) ...@@ -130,9 +130,8 @@ static void ar5008_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
/* pre-reverse this field */ /* pre-reverse this field */
tmp_reg = ath9k_hw_reverse_bits(new_bias, 3); tmp_reg = ath9k_hw_reverse_bits(new_bias, 3);
ath_print(common, ATH_DBG_CONFIG, ath_dbg(common, ATH_DBG_CONFIG, "Force rf_pwd_icsyndiv to %1d on %4d\n",
"Force rf_pwd_icsyndiv to %1d on %4d\n", new_bias, synth_freq);
new_bias, synth_freq);
/* swizzle rf_pwd_icsyndiv */ /* swizzle rf_pwd_icsyndiv */
ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3); ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
...@@ -1054,10 +1053,9 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, ...@@ -1054,10 +1053,9 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(ah->totalSizeDesired)) { if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"level out of range (%u > %u)\n", "level out of range (%u > %zu)\n",
level, level, ARRAY_SIZE(ah->totalSizeDesired));
(unsigned)ARRAY_SIZE(ah->totalSizeDesired));
return false; return false;
} }
...@@ -1159,10 +1157,9 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, ...@@ -1159,10 +1157,9 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(firstep)) { if (level >= ARRAY_SIZE(firstep)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"level out of range (%u > %u)\n", "level out of range (%u > %zu)\n",
level, level, ARRAY_SIZE(firstep));
(unsigned) ARRAY_SIZE(firstep));
return false; return false;
} }
REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
...@@ -1180,10 +1177,9 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, ...@@ -1180,10 +1177,9 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(cycpwrThr1)) { if (level >= ARRAY_SIZE(cycpwrThr1)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"level out of range (%u > %u)\n", "level out of range (%u > %zu)\n",
level, level, ARRAY_SIZE(cycpwrThr1));
(unsigned) ARRAY_SIZE(cycpwrThr1));
return false; return false;
} }
REG_RMW_FIELD(ah, AR_PHY_TIMING5, REG_RMW_FIELD(ah, AR_PHY_TIMING5,
...@@ -1199,25 +1195,22 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah, ...@@ -1199,25 +1195,22 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
case ATH9K_ANI_PRESENT: case ATH9K_ANI_PRESENT:
break; break;
default: default:
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI, "invalid cmd %u\n", cmd);
"invalid cmd %u\n", cmd);
return false; return false;
} }
ath_print(common, ATH_DBG_ANI, "ANI parameters:\n"); ath_dbg(common, ATH_DBG_ANI, "ANI parameters:\n");
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"noiseImmunityLevel=%d, spurImmunityLevel=%d, " "noiseImmunityLevel=%d, spurImmunityLevel=%d, ofdmWeakSigDetectOff=%d\n",
"ofdmWeakSigDetectOff=%d\n", aniState->noiseImmunityLevel,
aniState->noiseImmunityLevel, aniState->spurImmunityLevel,
aniState->spurImmunityLevel, !aniState->ofdmWeakSigDetectOff);
!aniState->ofdmWeakSigDetectOff); ath_dbg(common, ATH_DBG_ANI,
ath_print(common, ATH_DBG_ANI, "cckWeakSigThreshold=%d, firstepLevel=%d, listenTime=%d\n",
"cckWeakSigThreshold=%d, " aniState->cckWeakSigThreshold,
"firstepLevel=%d, listenTime=%d\n", aniState->firstepLevel,
aniState->cckWeakSigThreshold, aniState->listenTime);
aniState->firstepLevel, ath_dbg(common, ATH_DBG_ANI,
aniState->listenTime);
ath_print(common, ATH_DBG_ANI,
"ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n", "ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
aniState->ofdmPhyErrCount, aniState->ofdmPhyErrCount,
aniState->cckPhyErrCount); aniState->cckPhyErrCount);
...@@ -1302,12 +1295,12 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah, ...@@ -1302,12 +1295,12 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
if (!on != aniState->ofdmWeakSigDetectOff) { if (!on != aniState->ofdmWeakSigDetectOff) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: ofdm weak signal: %s=>%s\n", "** ch %d: ofdm weak signal: %s=>%s\n",
chan->channel, chan->channel,
!aniState->ofdmWeakSigDetectOff ? !aniState->ofdmWeakSigDetectOff ?
"on" : "off", "on" : "off",
on ? "on" : "off"); on ? "on" : "off");
if (on) if (on)
ah->stats.ast_ani_ofdmon++; ah->stats.ast_ani_ofdmon++;
else else
...@@ -1320,11 +1313,9 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah, ...@@ -1320,11 +1313,9 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(firstep_table)) { if (level >= ARRAY_SIZE(firstep_table)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ATH9K_ANI_FIRSTEP_LEVEL: level " "ATH9K_ANI_FIRSTEP_LEVEL: level out of range (%u > %zu)\n",
"out of range (%u > %u)\n", level, ARRAY_SIZE(firstep_table));
level,
(unsigned) ARRAY_SIZE(firstep_table));
return false; return false;
} }
...@@ -1359,24 +1350,22 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah, ...@@ -1359,24 +1350,22 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
AR_PHY_FIND_SIG_FIRSTEP_LOW, value2); AR_PHY_FIND_SIG_FIRSTEP_LOW, value2);
if (level != aniState->firstepLevel) { if (level != aniState->firstepLevel) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: level %d=>%d[def:%d] " "** ch %d: level %d=>%d[def:%d] firstep[level]=%d ini=%d\n",
"firstep[level]=%d ini=%d\n", chan->channel,
chan->channel, aniState->firstepLevel,
aniState->firstepLevel, level,
level, ATH9K_ANI_FIRSTEP_LVL_NEW,
ATH9K_ANI_FIRSTEP_LVL_NEW, value,
value, aniState->iniDef.firstep);
aniState->iniDef.firstep); ath_dbg(common, ATH_DBG_ANI,
ath_print(common, ATH_DBG_ANI, "** ch %d: level %d=>%d[def:%d] firstep_low[level]=%d ini=%d\n",
"** ch %d: level %d=>%d[def:%d] " chan->channel,
"firstep_low[level]=%d ini=%d\n", aniState->firstepLevel,
chan->channel, level,
aniState->firstepLevel, ATH9K_ANI_FIRSTEP_LVL_NEW,
level, value2,
ATH9K_ANI_FIRSTEP_LVL_NEW, aniState->iniDef.firstepLow);
value2,
aniState->iniDef.firstepLow);
if (level > aniState->firstepLevel) if (level > aniState->firstepLevel)
ah->stats.ast_ani_stepup++; ah->stats.ast_ani_stepup++;
else if (level < aniState->firstepLevel) else if (level < aniState->firstepLevel)
...@@ -1389,11 +1378,9 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah, ...@@ -1389,11 +1378,9 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(cycpwrThr1_table)) { if (level >= ARRAY_SIZE(cycpwrThr1_table)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level " "ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level out of range (%u > %zu)\n",
"out of range (%u > %u)\n", level, ARRAY_SIZE(cycpwrThr1_table));
level,
(unsigned) ARRAY_SIZE(cycpwrThr1_table));
return false; return false;
} }
/* /*
...@@ -1427,24 +1414,22 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah, ...@@ -1427,24 +1414,22 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
AR_PHY_EXT_TIMING5_CYCPWR_THR1, value2); AR_PHY_EXT_TIMING5_CYCPWR_THR1, value2);
if (level != aniState->spurImmunityLevel) { if (level != aniState->spurImmunityLevel) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: level %d=>%d[def:%d] " "** ch %d: level %d=>%d[def:%d] cycpwrThr1[level]=%d ini=%d\n",
"cycpwrThr1[level]=%d ini=%d\n", chan->channel,
chan->channel, aniState->spurImmunityLevel,
aniState->spurImmunityLevel, level,
level, ATH9K_ANI_SPUR_IMMUNE_LVL_NEW,
ATH9K_ANI_SPUR_IMMUNE_LVL_NEW, value,
value, aniState->iniDef.cycpwrThr1);
aniState->iniDef.cycpwrThr1); ath_dbg(common, ATH_DBG_ANI,
ath_print(common, ATH_DBG_ANI, "** ch %d: level %d=>%d[def:%d] cycpwrThr1Ext[level]=%d ini=%d\n",
"** ch %d: level %d=>%d[def:%d] " chan->channel,
"cycpwrThr1Ext[level]=%d ini=%d\n", aniState->spurImmunityLevel,
chan->channel, level,
aniState->spurImmunityLevel, ATH9K_ANI_SPUR_IMMUNE_LVL_NEW,
level, value2,
ATH9K_ANI_SPUR_IMMUNE_LVL_NEW, aniState->iniDef.cycpwrThr1Ext);
value2,
aniState->iniDef.cycpwrThr1Ext);
if (level > aniState->spurImmunityLevel) if (level > aniState->spurImmunityLevel)
ah->stats.ast_ani_spurup++; ah->stats.ast_ani_spurup++;
else if (level < aniState->spurImmunityLevel) else if (level < aniState->spurImmunityLevel)
...@@ -1463,22 +1448,19 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah, ...@@ -1463,22 +1448,19 @@ static bool ar5008_hw_ani_control_new(struct ath_hw *ah,
case ATH9K_ANI_PRESENT: case ATH9K_ANI_PRESENT:
break; break;
default: default:
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI, "invalid cmd %u\n", cmd);
"invalid cmd %u\n", cmd);
return false; return false;
} }
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ANI parameters: SI=%d, ofdmWS=%s FS=%d " "ANI parameters: SI=%d, ofdmWS=%s FS=%d MRCcck=%s listenTime=%d ofdmErrs=%d cckErrs=%d\n",
"MRCcck=%s listenTime=%d " aniState->spurImmunityLevel,
"ofdmErrs=%d cckErrs=%d\n", !aniState->ofdmWeakSigDetectOff ? "on" : "off",
aniState->spurImmunityLevel, aniState->firstepLevel,
!aniState->ofdmWeakSigDetectOff ? "on" : "off", !aniState->mrcCCKOff ? "on" : "off",
aniState->firstepLevel, aniState->listenTime,
!aniState->mrcCCKOff ? "on" : "off", aniState->ofdmPhyErrCount,
aniState->listenTime, aniState->cckPhyErrCount);
aniState->ofdmPhyErrCount,
aniState->cckPhyErrCount);
return true; return true;
} }
...@@ -1524,13 +1506,12 @@ static void ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah) ...@@ -1524,13 +1506,12 @@ static void ar5008_hw_ani_cache_ini_regs(struct ath_hw *ah)
iniDef = &aniState->iniDef; iniDef = &aniState->iniDef;
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI, "ver %d.%d opmode %u chan %d Mhz/0x%x\n",
"ver %d.%d opmode %u chan %d Mhz/0x%x\n", ah->hw_version.macVersion,
ah->hw_version.macVersion, ah->hw_version.macRev,
ah->hw_version.macRev, ah->opmode,
ah->opmode, chan->channel,
chan->channel, chan->channelFlags);
chan->channelFlags);
val = REG_READ(ah, AR_PHY_SFCORR); val = REG_READ(ah, AR_PHY_SFCORR);
iniDef->m1Thresh = MS(val, AR_PHY_SFCORR_M1_THRESH); iniDef->m1Thresh = MS(val, AR_PHY_SFCORR_M1_THRESH);
......
drivers/net/wireless/ath/ath9k/ar9002_mac.c
View file @ 226afe68
...@@ -111,8 +111,8 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) ...@@ -111,8 +111,8 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
} }
if (isr & AR_ISR_RXORN) { if (isr & AR_ISR_RXORN) {
ath_print(common, ATH_DBG_INTERRUPT, ath_dbg(common, ATH_DBG_INTERRUPT,
"receive FIFO overrun interrupt\n"); "receive FIFO overrun interrupt\n");
} }
*masked |= mask2; *masked |= mask2;
...@@ -147,25 +147,25 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) ...@@ -147,25 +147,25 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
if (fatal_int) { if (fatal_int) {
if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) { if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"received PCI FATAL interrupt\n"); "received PCI FATAL interrupt\n");
} }
if (sync_cause & AR_INTR_SYNC_HOST1_PERR) { if (sync_cause & AR_INTR_SYNC_HOST1_PERR) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"received PCI PERR interrupt\n"); "received PCI PERR interrupt\n");
} }
*masked |= ATH9K_INT_FATAL; *masked |= ATH9K_INT_FATAL;
} }
if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) { if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
ath_print(common, ATH_DBG_INTERRUPT, ath_dbg(common, ATH_DBG_INTERRUPT,
"AR_INTR_SYNC_RADM_CPL_TIMEOUT\n"); "AR_INTR_SYNC_RADM_CPL_TIMEOUT\n");
REG_WRITE(ah, AR_RC, AR_RC_HOSTIF); REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);
REG_WRITE(ah, AR_RC, 0); REG_WRITE(ah, AR_RC, 0);
*masked |= ATH9K_INT_FATAL; *masked |= ATH9K_INT_FATAL;
} }
if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) { if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) {
ath_print(common, ATH_DBG_INTERRUPT, ath_dbg(common, ATH_DBG_INTERRUPT,
"AR_INTR_SYNC_LOCAL_TIMEOUT\n"); "AR_INTR_SYNC_LOCAL_TIMEOUT\n");
} }
REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause); REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
......
drivers/net/wireless/ath/ath9k/ar9003_mac.c
View file @ 226afe68
...@@ -182,8 +182,8 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) ...@@ -182,8 +182,8 @@ static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked)
} }
if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT)
ath_print(common, ATH_DBG_INTERRUPT, ath_dbg(common, ATH_DBG_INTERRUPT,
"AR_INTR_SYNC_LOCAL_TIMEOUT\n"); "AR_INTR_SYNC_LOCAL_TIMEOUT\n");
REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause); REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
(void) REG_READ(ah, AR_INTR_SYNC_CAUSE_CLR); (void) REG_READ(ah, AR_INTR_SYNC_CAUSE_CLR);
...@@ -249,8 +249,8 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds, ...@@ -249,8 +249,8 @@ static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
if ((MS(ads->ds_info, AR_DescId) != ATHEROS_VENDOR_ID) || if ((MS(ads->ds_info, AR_DescId) != ATHEROS_VENDOR_ID) ||
(MS(ads->ds_info, AR_TxRxDesc) != 1)) { (MS(ads->ds_info, AR_TxRxDesc) != 1)) {
ath_print(ath9k_hw_common(ah), ATH_DBG_XMIT, ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
"Tx Descriptor error %x\n", ads->ds_info); "Tx Descriptor error %x\n", ads->ds_info);
memset(ads, 0, sizeof(*ads)); memset(ads, 0, sizeof(*ads));
return -EIO; return -EIO;
} }
...@@ -658,10 +658,10 @@ void ath9k_hw_reset_txstatus_ring(struct ath_hw *ah) ...@@ -658,10 +658,10 @@ void ath9k_hw_reset_txstatus_ring(struct ath_hw *ah)
memset((void *) ah->ts_ring, 0, memset((void *) ah->ts_ring, 0,
ah->ts_size * sizeof(struct ar9003_txs)); ah->ts_size * sizeof(struct ar9003_txs));
ath_print(ath9k_hw_common(ah), ATH_DBG_XMIT, ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
"TS Start 0x%x End 0x%x Virt %p, Size %d\n", "TS Start 0x%x End 0x%x Virt %p, Size %d\n",
ah->ts_paddr_start, ah->ts_paddr_end, ah->ts_paddr_start, ah->ts_paddr_end,
ah->ts_ring, ah->ts_size); ah->ts_ring, ah->ts_size);
REG_WRITE(ah, AR_Q_STATUS_RING_START, ah->ts_paddr_start); REG_WRITE(ah, AR_Q_STATUS_RING_START, ah->ts_paddr_start);
REG_WRITE(ah, AR_Q_STATUS_RING_END, ah->ts_paddr_end); REG_WRITE(ah, AR_Q_STATUS_RING_END, ah->ts_paddr_end);
......
drivers/net/wireless/ath/ath9k/ar9003_phy.c
View file @ 226afe68
...@@ -824,12 +824,12 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -824,12 +824,12 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW); AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
if (!on != aniState->ofdmWeakSigDetectOff) { if (!on != aniState->ofdmWeakSigDetectOff) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: ofdm weak signal: %s=>%s\n", "** ch %d: ofdm weak signal: %s=>%s\n",
chan->channel, chan->channel,
!aniState->ofdmWeakSigDetectOff ? !aniState->ofdmWeakSigDetectOff ?
"on" : "off", "on" : "off",
on ? "on" : "off"); on ? "on" : "off");
if (on) if (on)
ah->stats.ast_ani_ofdmon++; ah->stats.ast_ani_ofdmon++;
else else
...@@ -842,11 +842,9 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -842,11 +842,9 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(firstep_table)) { if (level >= ARRAY_SIZE(firstep_table)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ATH9K_ANI_FIRSTEP_LEVEL: level " "ATH9K_ANI_FIRSTEP_LEVEL: level out of range (%u > %zu)\n",
"out of range (%u > %u)\n", level, ARRAY_SIZE(firstep_table));
level,
(unsigned) ARRAY_SIZE(firstep_table));
return false; return false;
} }
...@@ -881,24 +879,22 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -881,24 +879,22 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW, value2); AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW, value2);
if (level != aniState->firstepLevel) { if (level != aniState->firstepLevel) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: level %d=>%d[def:%d] " "** ch %d: level %d=>%d[def:%d] firstep[level]=%d ini=%d\n",
"firstep[level]=%d ini=%d\n", chan->channel,
chan->channel, aniState->firstepLevel,
aniState->firstepLevel, level,
level, ATH9K_ANI_FIRSTEP_LVL_NEW,
ATH9K_ANI_FIRSTEP_LVL_NEW, value,
value, aniState->iniDef.firstep);
aniState->iniDef.firstep); ath_dbg(common, ATH_DBG_ANI,
ath_print(common, ATH_DBG_ANI, "** ch %d: level %d=>%d[def:%d] firstep_low[level]=%d ini=%d\n",
"** ch %d: level %d=>%d[def:%d] " chan->channel,
"firstep_low[level]=%d ini=%d\n", aniState->firstepLevel,
chan->channel, level,
aniState->firstepLevel, ATH9K_ANI_FIRSTEP_LVL_NEW,
level, value2,
ATH9K_ANI_FIRSTEP_LVL_NEW, aniState->iniDef.firstepLow);
value2,
aniState->iniDef.firstepLow);
if (level > aniState->firstepLevel) if (level > aniState->firstepLevel)
ah->stats.ast_ani_stepup++; ah->stats.ast_ani_stepup++;
else if (level < aniState->firstepLevel) else if (level < aniState->firstepLevel)
...@@ -911,11 +907,9 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -911,11 +907,9 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(cycpwrThr1_table)) { if (level >= ARRAY_SIZE(cycpwrThr1_table)) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level " "ATH9K_ANI_SPUR_IMMUNITY_LEVEL: level out of range (%u > %zu)\n",
"out of range (%u > %u)\n", level, ARRAY_SIZE(cycpwrThr1_table));
level,
(unsigned) ARRAY_SIZE(cycpwrThr1_table));
return false; return false;
} }
/* /*
...@@ -949,24 +943,22 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -949,24 +943,22 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
AR_PHY_EXT_CYCPWR_THR1, value2); AR_PHY_EXT_CYCPWR_THR1, value2);
if (level != aniState->spurImmunityLevel) { if (level != aniState->spurImmunityLevel) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: level %d=>%d[def:%d] " "** ch %d: level %d=>%d[def:%d] cycpwrThr1[level]=%d ini=%d\n",
"cycpwrThr1[level]=%d ini=%d\n", chan->channel,
chan->channel, aniState->spurImmunityLevel,
aniState->spurImmunityLevel, level,
level, ATH9K_ANI_SPUR_IMMUNE_LVL_NEW,
ATH9K_ANI_SPUR_IMMUNE_LVL_NEW, value,
value, aniState->iniDef.cycpwrThr1);
aniState->iniDef.cycpwrThr1); ath_dbg(common, ATH_DBG_ANI,
ath_print(common, ATH_DBG_ANI, "** ch %d: level %d=>%d[def:%d] cycpwrThr1Ext[level]=%d ini=%d\n",
"** ch %d: level %d=>%d[def:%d] " chan->channel,
"cycpwrThr1Ext[level]=%d ini=%d\n", aniState->spurImmunityLevel,
chan->channel, level,
aniState->spurImmunityLevel, ATH9K_ANI_SPUR_IMMUNE_LVL_NEW,
level, value2,
ATH9K_ANI_SPUR_IMMUNE_LVL_NEW, aniState->iniDef.cycpwrThr1Ext);
value2,
aniState->iniDef.cycpwrThr1Ext);
if (level > aniState->spurImmunityLevel) if (level > aniState->spurImmunityLevel)
ah->stats.ast_ani_spurup++; ah->stats.ast_ani_spurup++;
else if (level < aniState->spurImmunityLevel) else if (level < aniState->spurImmunityLevel)
...@@ -986,11 +978,11 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -986,11 +978,11 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL, REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL,
AR_PHY_MRC_CCK_MUX_REG, is_on); AR_PHY_MRC_CCK_MUX_REG, is_on);
if (!is_on != aniState->mrcCCKOff) { if (!is_on != aniState->mrcCCKOff) {
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"** ch %d: MRC CCK: %s=>%s\n", "** ch %d: MRC CCK: %s=>%s\n",
chan->channel, chan->channel,
!aniState->mrcCCKOff ? "on" : "off", !aniState->mrcCCKOff ? "on" : "off",
is_on ? "on" : "off"); is_on ? "on" : "off");
if (is_on) if (is_on)
ah->stats.ast_ani_ccklow++; ah->stats.ast_ani_ccklow++;
else else
...@@ -1002,22 +994,19 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, ...@@ -1002,22 +994,19 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
case ATH9K_ANI_PRESENT: case ATH9K_ANI_PRESENT:
break; break;
default: default:
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI, "invalid cmd %u\n", cmd);
"invalid cmd %u\n", cmd);
return false; return false;
} }
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ANI parameters: SI=%d, ofdmWS=%s FS=%d " "ANI parameters: SI=%d, ofdmWS=%s FS=%d MRCcck=%s listenTime=%d ofdmErrs=%d cckErrs=%d\n",
"MRCcck=%s listenTime=%d " aniState->spurImmunityLevel,
"ofdmErrs=%d cckErrs=%d\n", !aniState->ofdmWeakSigDetectOff ? "on" : "off",
aniState->spurImmunityLevel, aniState->firstepLevel,
!aniState->ofdmWeakSigDetectOff ? "on" : "off", !aniState->mrcCCKOff ? "on" : "off",
aniState->firstepLevel, aniState->listenTime,
!aniState->mrcCCKOff ? "on" : "off", aniState->ofdmPhyErrCount,
aniState->listenTime, aniState->cckPhyErrCount);
aniState->ofdmPhyErrCount,
aniState->cckPhyErrCount);
return true; return true;
} }
...@@ -1074,13 +1063,13 @@ static void ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah) ...@@ -1074,13 +1063,13 @@ static void ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah)
aniState = &ah->curchan->ani; aniState = &ah->curchan->ani;
iniDef = &aniState->iniDef; iniDef = &aniState->iniDef;
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"ver %d.%d opmode %u chan %d Mhz/0x%x\n", "ver %d.%d opmode %u chan %d Mhz/0x%x\n",
ah->hw_version.macVersion, ah->hw_version.macVersion,
ah->hw_version.macRev, ah->hw_version.macRev,
ah->opmode, ah->opmode,
chan->channel, chan->channel,
chan->channelFlags); chan->channelFlags);
val = REG_READ(ah, AR_PHY_SFCORR); val = REG_READ(ah, AR_PHY_SFCORR);
iniDef->m1Thresh = MS(val, AR_PHY_SFCORR_M1_THRESH); iniDef->m1Thresh = MS(val, AR_PHY_SFCORR_M1_THRESH);
...@@ -1216,7 +1205,7 @@ void ar9003_hw_bb_watchdog_config(struct ath_hw *ah) ...@@ -1216,7 +1205,7 @@ void ar9003_hw_bb_watchdog_config(struct ath_hw *ah)
~(AR_PHY_WATCHDOG_NON_IDLE_ENABLE | ~(AR_PHY_WATCHDOG_NON_IDLE_ENABLE |
AR_PHY_WATCHDOG_IDLE_ENABLE)); AR_PHY_WATCHDOG_IDLE_ENABLE));
ath_print(common, ATH_DBG_RESET, "Disabled BB Watchdog\n"); ath_dbg(common, ATH_DBG_RESET, "Disabled BB Watchdog\n");
return; return;
} }
...@@ -1252,9 +1241,9 @@ void ar9003_hw_bb_watchdog_config(struct ath_hw *ah) ...@@ -1252,9 +1241,9 @@ void ar9003_hw_bb_watchdog_config(struct ath_hw *ah)
AR_PHY_WATCHDOG_IDLE_MASK | AR_PHY_WATCHDOG_IDLE_MASK |
(AR_PHY_WATCHDOG_NON_IDLE_MASK & (idle_count << 2))); (AR_PHY_WATCHDOG_NON_IDLE_MASK & (idle_count << 2)));
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"Enabled BB Watchdog timeout (%u ms)\n", "Enabled BB Watchdog timeout (%u ms)\n",
idle_tmo_ms); idle_tmo_ms);
} }
void ar9003_hw_bb_watchdog_read(struct ath_hw *ah) void ar9003_hw_bb_watchdog_read(struct ath_hw *ah)
...@@ -1282,37 +1271,35 @@ void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah) ...@@ -1282,37 +1271,35 @@ void ar9003_hw_bb_watchdog_dbg_info(struct ath_hw *ah)
return; return;
status = ah->bb_watchdog_last_status; status = ah->bb_watchdog_last_status;
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"\n==== BB update: BB status=0x%08x ====\n", status); "\n==== BB update: BB status=0x%08x ====\n", status);
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"** BB state: wd=%u det=%u rdar=%u rOFDM=%d " "** BB state: wd=%u det=%u rdar=%u rOFDM=%d rCCK=%u tOFDM=%u tCCK=%u agc=%u src=%u **\n",
"rCCK=%u tOFDM=%u tCCK=%u agc=%u src=%u **\n", MS(status, AR_PHY_WATCHDOG_INFO),
MS(status, AR_PHY_WATCHDOG_INFO), MS(status, AR_PHY_WATCHDOG_DET_HANG),
MS(status, AR_PHY_WATCHDOG_DET_HANG), MS(status, AR_PHY_WATCHDOG_RADAR_SM),
MS(status, AR_PHY_WATCHDOG_RADAR_SM), MS(status, AR_PHY_WATCHDOG_RX_OFDM_SM),
MS(status, AR_PHY_WATCHDOG_RX_OFDM_SM), MS(status, AR_PHY_WATCHDOG_RX_CCK_SM),
MS(status, AR_PHY_WATCHDOG_RX_CCK_SM), MS(status, AR_PHY_WATCHDOG_TX_OFDM_SM),
MS(status, AR_PHY_WATCHDOG_TX_OFDM_SM), MS(status, AR_PHY_WATCHDOG_TX_CCK_SM),
MS(status, AR_PHY_WATCHDOG_TX_CCK_SM), MS(status, AR_PHY_WATCHDOG_AGC_SM),
MS(status, AR_PHY_WATCHDOG_AGC_SM), MS(status, AR_PHY_WATCHDOG_SRCH_SM));
MS(status,AR_PHY_WATCHDOG_SRCH_SM));
ath_dbg(common, ATH_DBG_RESET,
ath_print(common, ATH_DBG_RESET, "** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n",
"** BB WD cntl: cntl1=0x%08x cntl2=0x%08x **\n", REG_READ(ah, AR_PHY_WATCHDOG_CTL_1),
REG_READ(ah, AR_PHY_WATCHDOG_CTL_1), REG_READ(ah, AR_PHY_WATCHDOG_CTL_2));
REG_READ(ah, AR_PHY_WATCHDOG_CTL_2)); ath_dbg(common, ATH_DBG_RESET,
ath_print(common, ATH_DBG_RESET, "** BB mode: BB_gen_controls=0x%08x **\n",
"** BB mode: BB_gen_controls=0x%08x **\n", REG_READ(ah, AR_PHY_GEN_CTRL));
REG_READ(ah, AR_PHY_GEN_CTRL));
#define PCT(_field) (common->cc_survey._field * 100 / common->cc_survey.cycles) #define PCT(_field) (common->cc_survey._field * 100 / common->cc_survey.cycles)
if (common->cc_survey.cycles) if (common->cc_survey.cycles)
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"** BB busy times: rx_clear=%d%%, " "** BB busy times: rx_clear=%d%%, rx_frame=%d%%, tx_frame=%d%% **\n",
"rx_frame=%d%%, tx_frame=%d%% **\n", PCT(rx_busy), PCT(rx_frame), PCT(tx_frame));
PCT(rx_busy), PCT(rx_frame), PCT(tx_frame));
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"==== BB update: done ====\n\n"); "==== BB update: done ====\n\n");
} }
EXPORT_SYMBOL(ar9003_hw_bb_watchdog_dbg_info); EXPORT_SYMBOL(ar9003_hw_bb_watchdog_dbg_info);
drivers/net/wireless/ath/ath9k/beacon.c
View file @ 226afe68
...@@ -120,11 +120,11 @@ static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb) ...@@ -120,11 +120,11 @@ static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
memset(&txctl, 0, sizeof(struct ath_tx_control)); memset(&txctl, 0, sizeof(struct ath_tx_control));
txctl.txq = sc->beacon.cabq; txctl.txq = sc->beacon.cabq;
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT,
"transmitting CABQ packet, skb: %p\n", skb); "transmitting CABQ packet, skb: %p\n", skb);
if (ath_tx_start(hw, skb, &txctl) != 0) { if (ath_tx_start(hw, skb, &txctl) != 0) {
ath_print(common, ATH_DBG_XMIT, "CABQ TX failed\n"); ath_dbg(common, ATH_DBG_XMIT, "CABQ TX failed\n");
dev_kfree_skb_any(skb); dev_kfree_skb_any(skb);
} }
} }
...@@ -209,8 +209,8 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, ...@@ -209,8 +209,8 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
if (skb && cabq_depth) { if (skb && cabq_depth) {
if (sc->nvifs > 1) { if (sc->nvifs > 1) {
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"Flushing previous cabq traffic\n"); "Flushing previous cabq traffic\n");
ath_draintxq(sc, cabq, false); ath_draintxq(sc, cabq, false);
} }
} }
...@@ -282,7 +282,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) ...@@ -282,7 +282,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
/* NB: the beacon data buffer must be 32-bit aligned. */ /* NB: the beacon data buffer must be 32-bit aligned. */
skb = ieee80211_beacon_get(sc->hw, vif); skb = ieee80211_beacon_get(sc->hw, vif);
if (skb == NULL) { if (skb == NULL) {
ath_print(common, ATH_DBG_BEACON, "cannot get skb\n"); ath_dbg(common, ATH_DBG_BEACON, "cannot get skb\n");
return -ENOMEM; return -ENOMEM;
} }
...@@ -306,10 +306,9 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) ...@@ -306,10 +306,9 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
tsfadjust = intval * avp->av_bslot / ATH_BCBUF; tsfadjust = intval * avp->av_bslot / ATH_BCBUF;
avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust)); avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"stagger beacons, bslot %d intval " "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
"%u tsfadjust %llu\n", avp->av_bslot, intval, (unsigned long long)tsfadjust);
avp->av_bslot, intval, (unsigned long long)tsfadjust);
((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
avp->tsf_adjust; avp->tsf_adjust;
...@@ -380,13 +379,13 @@ void ath_beacon_tasklet(unsigned long data) ...@@ -380,13 +379,13 @@ void ath_beacon_tasklet(unsigned long data)
sc->beacon.bmisscnt++; sc->beacon.bmisscnt++;
if (sc->beacon.bmisscnt < BSTUCK_THRESH) { if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
ath_print(common, ATH_DBG_BSTUCK, ath_dbg(common, ATH_DBG_BSTUCK,
"missed %u consecutive beacons\n", "missed %u consecutive beacons\n",
sc->beacon.bmisscnt); sc->beacon.bmisscnt);
ath9k_hw_bstuck_nfcal(ah); ath9k_hw_bstuck_nfcal(ah);
} else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) { } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
ath_print(common, ATH_DBG_BSTUCK, ath_dbg(common, ATH_DBG_BSTUCK,
"beacon is officially stuck\n"); "beacon is officially stuck\n");
sc->sc_flags |= SC_OP_TSF_RESET; sc->sc_flags |= SC_OP_TSF_RESET;
ath_reset(sc, true); ath_reset(sc, true);
} }
...@@ -395,9 +394,9 @@ void ath_beacon_tasklet(unsigned long data) ...@@ -395,9 +394,9 @@ void ath_beacon_tasklet(unsigned long data)
} }
if (sc->beacon.bmisscnt != 0) { if (sc->beacon.bmisscnt != 0) {
ath_print(common, ATH_DBG_BSTUCK, ath_dbg(common, ATH_DBG_BSTUCK,
"resume beacon xmit after %u misses\n", "resume beacon xmit after %u misses\n",
sc->beacon.bmisscnt); sc->beacon.bmisscnt);
sc->beacon.bmisscnt = 0; sc->beacon.bmisscnt = 0;
} }
...@@ -423,9 +422,9 @@ void ath_beacon_tasklet(unsigned long data) ...@@ -423,9 +422,9 @@ void ath_beacon_tasklet(unsigned long data)
vif = sc->beacon.bslot[slot]; vif = sc->beacon.bslot[slot];
aphy = sc->beacon.bslot_aphy[slot]; aphy = sc->beacon.bslot_aphy[slot];
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"slot %d [tsf %llu tsftu %u intval %u] vif %p\n", "slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
slot, tsf, tsftu, intval, vif); slot, tsf, tsftu, intval, vif);
bfaddr = 0; bfaddr = 0;
if (vif) { if (vif) {
...@@ -554,8 +553,8 @@ static void ath_beacon_config_sta(struct ath_softc *sc, ...@@ -554,8 +553,8 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
/* No need to configure beacon if we are not associated */ /* No need to configure beacon if we are not associated */
if (!common->curaid) { if (!common->curaid) {
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"STA is not yet associated..skipping beacon config\n"); "STA is not yet associated..skipping beacon config\n");
return; return;
} }
...@@ -648,11 +647,11 @@ static void ath_beacon_config_sta(struct ath_softc *sc, ...@@ -648,11 +647,11 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
/* TSF out of range threshold fixed at 1 second */ /* TSF out of range threshold fixed at 1 second */
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
ath_print(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); ath_dbg(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
bs.bs_bmissthreshold, bs.bs_sleepduration, bs.bs_bmissthreshold, bs.bs_sleepduration,
bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
/* Set the computed STA beacon timers */ /* Set the computed STA beacon timers */
...@@ -688,9 +687,9 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc, ...@@ -688,9 +687,9 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
nexttbtt += intval; nexttbtt += intval;
} while (nexttbtt < tsftu); } while (nexttbtt < tsftu);
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"IBSS nexttbtt %u intval %u (%u)\n", "IBSS nexttbtt %u intval %u (%u)\n",
nexttbtt, intval, conf->beacon_interval); nexttbtt, intval, conf->beacon_interval);
/* /*
* In IBSS mode enable the beacon timers but only enable SWBA interrupts * In IBSS mode enable the beacon timers but only enable SWBA interrupts
...@@ -753,8 +752,8 @@ void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) ...@@ -753,8 +752,8 @@ void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
ath_beacon_config_sta(sc, cur_conf); ath_beacon_config_sta(sc, cur_conf);
break; break;
default: default:
ath_print(common, ATH_DBG_CONFIG, ath_dbg(common, ATH_DBG_CONFIG,
"Unsupported beaconing mode\n"); "Unsupported beaconing mode\n");
return; return;
} }
......
drivers/net/wireless/ath/ath9k/calib.c
View file @ 226afe68
...@@ -97,12 +97,12 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah, ...@@ -97,12 +97,12 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
if (h[i].privNF > limit->max) { if (h[i].privNF > limit->max) {
high_nf_mid = true; high_nf_mid = true;
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"NFmid[%d] (%d) > MAX (%d), %s\n", "NFmid[%d] (%d) > MAX (%d), %s\n",
i, h[i].privNF, limit->max, i, h[i].privNF, limit->max,
(cal->nfcal_interference ? (cal->nfcal_interference ?
"not corrected (due to interference)" : "not corrected (due to interference)" :
"correcting to MAX")); "correcting to MAX"));
/* /*
* Normally we limit the average noise floor by the * Normally we limit the average noise floor by the
...@@ -180,18 +180,18 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah) ...@@ -180,18 +180,18 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
return true; return true;
if (currCal->calState != CAL_DONE) { if (currCal->calState != CAL_DONE) {
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"Calibration state incorrect, %d\n", "Calibration state incorrect, %d\n",
currCal->calState); currCal->calState);
return true; return true;
} }
if (!(ah->supp_cals & currCal->calData->calType)) if (!(ah->supp_cals & currCal->calData->calType))
return true; return true;
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"Resetting Cal %d state for channel %u\n", "Resetting Cal %d state for channel %u\n",
currCal->calData->calType, conf->channel->center_freq); currCal->calData->calType, conf->channel->center_freq);
ah->caldata->CalValid &= ~currCal->calData->calType; ah->caldata->CalValid &= ~currCal->calData->calType;
currCal->calState = CAL_WAITING; currCal->calState = CAL_WAITING;
...@@ -279,9 +279,9 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -279,9 +279,9 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
* noisefloor until the next calibration timer. * noisefloor until the next calibration timer.
*/ */
if (j == 1000) { if (j == 1000) {
ath_print(common, ATH_DBG_ANY, "Timeout while waiting for nf " ath_dbg(common, ATH_DBG_ANY,
"to load: AR_PHY_AGC_CONTROL=0x%x\n", "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
REG_READ(ah, AR_PHY_AGC_CONTROL)); REG_READ(ah, AR_PHY_AGC_CONTROL));
return; return;
} }
...@@ -318,19 +318,19 @@ static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf) ...@@ -318,19 +318,19 @@ static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
if (!nf[i]) if (!nf[i])
continue; continue;
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"NF calibrated [%s] [chain %d] is %d\n", "NF calibrated [%s] [chain %d] is %d\n",
(i >= 3 ? "ext" : "ctl"), i % 3, nf[i]); (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
if (nf[i] > ATH9K_NF_TOO_HIGH) { if (nf[i] > ATH9K_NF_TOO_HIGH) {
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"NF[%d] (%d) > MAX (%d), correcting to MAX", "NF[%d] (%d) > MAX (%d), correcting to MAX\n",
i, nf[i], ATH9K_NF_TOO_HIGH); i, nf[i], ATH9K_NF_TOO_HIGH);
nf[i] = limit->max; nf[i] = limit->max;
} else if (nf[i] < limit->min) { } else if (nf[i] < limit->min) {
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"NF[%d] (%d) < MIN (%d), correcting to NOM", "NF[%d] (%d) < MIN (%d), correcting to NOM\n",
i, nf[i], limit->min); i, nf[i], limit->min);
nf[i] = limit->nominal; nf[i] = limit->nominal;
} }
} }
...@@ -347,8 +347,8 @@ bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -347,8 +347,8 @@ bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
chan->channelFlags &= (~CHANNEL_CW_INT); chan->channelFlags &= (~CHANNEL_CW_INT);
if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) { if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"NF did not complete in calibration window\n"); "NF did not complete in calibration window\n");
return false; return false;
} }
...@@ -357,10 +357,9 @@ bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan) ...@@ -357,10 +357,9 @@ bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
nf = nfarray[0]; nf = nfarray[0];
if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh) if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
&& nf > nfThresh) { && nf > nfThresh) {
ath_print(common, ATH_DBG_CALIBRATE, ath_dbg(common, ATH_DBG_CALIBRATE,
"noise floor failed detected; " "noise floor failed detected; detected %d, threshold %d\n",
"detected %d, threshold %d\n", nf, nfThresh);
nf, nfThresh);
chan->channelFlags |= CHANNEL_CW_INT; chan->channelFlags |= CHANNEL_CW_INT;
} }
......
drivers/net/wireless/ath/ath9k/common.c
View file @ 226afe68
...@@ -180,8 +180,8 @@ void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common, ...@@ -180,8 +180,8 @@ void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common,
AR_STOMP_NONE_WLAN_WGHT); AR_STOMP_NONE_WLAN_WGHT);
break; break;
default: default:
ath_print(common, ATH_DBG_BTCOEX, ath_dbg(common, ATH_DBG_BTCOEX,
"Invalid Stomptype\n"); "Invalid Stomptype\n");
break; break;
} }
......
drivers/net/wireless/ath/ath9k/common.h
View file @ 226afe68
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
#include <net/mac80211.h> #include <net/mac80211.h>
#include "../ath.h" #include "../ath.h"
#include "../debug.h"
#include "hw.h" #include "hw.h"
#include "hw-ops.h" #include "hw-ops.h"
......
drivers/net/wireless/ath/ath9k/eeprom.c
View file @ 226afe68
...@@ -273,8 +273,8 @@ void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah) ...@@ -273,8 +273,8 @@ void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah)
regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN; regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
break; break;
default: default:
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Invalid chainmask configuration\n"); "Invalid chainmask configuration\n");
break; break;
} }
} }
......
drivers/net/wireless/ath/ath9k/eeprom_4k.c
View file @ 226afe68
...@@ -37,14 +37,14 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah) ...@@ -37,14 +37,14 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
eep_start_loc = 64; eep_start_loc = 64;
if (!ath9k_hw_use_flash(ah)) { if (!ath9k_hw_use_flash(ah)) {
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Reading from EEPROM, not flash\n"); "Reading from EEPROM, not flash\n");
} }
for (addr = 0; addr < SIZE_EEPROM_4K; addr++) { for (addr = 0; addr < SIZE_EEPROM_4K; addr++) {
if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, eep_data)) { if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, eep_data)) {
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Unable to read eeprom region\n"); "Unable to read eeprom region\n");
return false; return false;
} }
eep_data++; eep_data++;
...@@ -73,8 +73,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah) ...@@ -73,8 +73,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
return false; return false;
} }
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Read Magic = 0x%04X\n", magic); "Read Magic = 0x%04X\n", magic);
if (magic != AR5416_EEPROM_MAGIC) { if (magic != AR5416_EEPROM_MAGIC) {
magic2 = swab16(magic); magic2 = swab16(magic);
...@@ -90,14 +90,14 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah) ...@@ -90,14 +90,14 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
} }
} else { } else {
ath_err(common, ath_err(common,
"Invalid EEPROM Magic. endianness mismatch.\n"); "Invalid EEPROM Magic. Endianness mismatch.\n");
return -EINVAL; return -EINVAL;
} }
} }
} }
ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", ath_dbg(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
need_swap ? "True" : "False"); need_swap ? "True" : "False");
if (need_swap) if (need_swap)
el = swab16(ah->eeprom.map4k.baseEepHeader.length); el = swab16(ah->eeprom.map4k.baseEepHeader.length);
...@@ -118,8 +118,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah) ...@@ -118,8 +118,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
u32 integer; u32 integer;
u16 word; u16 word;
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"EEPROM Endianness is not native.. Changing\n"); "EEPROM Endianness is not native.. Changing\n");
word = swab16(eep->baseEepHeader.length); word = swab16(eep->baseEepHeader.length);
eep->baseEepHeader.length = word; eep->baseEepHeader.length = word;
...@@ -485,21 +485,20 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, ...@@ -485,21 +485,20 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
((pdadcValues[4 * j + 3] & 0xFF) << 24); ((pdadcValues[4 * j + 3] & 0xFF) << 24);
REG_WRITE(ah, regOffset, reg32); REG_WRITE(ah, regOffset, reg32);
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"PDADC (%d,%4x): %4.4x %8.8x\n", "PDADC (%d,%4x): %4.4x %8.8x\n",
i, regChainOffset, regOffset, i, regChainOffset, regOffset,
reg32); reg32);
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"PDADC: Chain %d | " "PDADC: Chain %d | "
"PDADC %3d Value %3d | " "PDADC %3d Value %3d | "
"PDADC %3d Value %3d | " "PDADC %3d Value %3d | "
"PDADC %3d Value %3d | " "PDADC %3d Value %3d | "
"PDADC %3d Value %3d |\n", "PDADC %3d Value %3d |\n",
i, 4 * j, pdadcValues[4 * j], i, 4 * j, pdadcValues[4 * j],
4 * j + 1, pdadcValues[4 * j + 1], 4 * j + 1, pdadcValues[4 * j + 1],
4 * j + 2, pdadcValues[4 * j + 2], 4 * j + 2, pdadcValues[4 * j + 2],
4 * j + 3, 4 * j + 3, pdadcValues[4 * j + 3]);
pdadcValues[4 * j + 3]);
regOffset += 4; regOffset += 4;
} }
...@@ -1178,17 +1177,17 @@ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) ...@@ -1178,17 +1177,17 @@ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
u16 spur_val = AR_NO_SPUR; u16 spur_val = AR_NO_SPUR;
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Getting spur idx %d is2Ghz. %d val %x\n", "Getting spur idx:%d is2Ghz:%d val:%x\n",
i, is2GHz, ah->config.spurchans[i][is2GHz]); i, is2GHz, ah->config.spurchans[i][is2GHz]);
switch (ah->config.spurmode) { switch (ah->config.spurmode) {
case SPUR_DISABLE: case SPUR_DISABLE:
break; break;
case SPUR_ENABLE_IOCTL: case SPUR_ENABLE_IOCTL:
spur_val = ah->config.spurchans[i][is2GHz]; spur_val = ah->config.spurchans[i][is2GHz];
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Getting spur val from new loc. %d\n", spur_val); "Getting spur val from new loc. %d\n", spur_val);
break; break;
case SPUR_ENABLE_EEPROM: case SPUR_ENABLE_EEPROM:
spur_val = EEP_MAP4K_SPURCHAN; spur_val = EEP_MAP4K_SPURCHAN;
......
drivers/net/wireless/ath/ath9k/eeprom_9287.c
View file @ 226afe68
...@@ -43,15 +43,15 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) ...@@ -43,15 +43,15 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
eep_start_loc = AR9287_HTC_EEP_START_LOC; eep_start_loc = AR9287_HTC_EEP_START_LOC;
if (!ath9k_hw_use_flash(ah)) { if (!ath9k_hw_use_flash(ah)) {
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Reading from EEPROM, not flash\n"); "Reading from EEPROM, not flash\n");
} }
for (addr = 0; addr < NUM_EEP_WORDS; addr++) { for (addr = 0; addr < NUM_EEP_WORDS; addr++) {
if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, if (!ath9k_hw_nvram_read(common, addr + eep_start_loc,
eep_data)) { eep_data)) {
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Unable to read eeprom region\n"); "Unable to read eeprom region\n");
return false; return false;
} }
eep_data++; eep_data++;
...@@ -76,8 +76,8 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah) ...@@ -76,8 +76,8 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
return false; return false;
} }
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Read Magic = 0x%04X\n", magic); "Read Magic = 0x%04X\n", magic);
if (magic != AR5416_EEPROM_MAGIC) { if (magic != AR5416_EEPROM_MAGIC) {
magic2 = swab16(magic); magic2 = swab16(magic);
...@@ -99,8 +99,8 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah) ...@@ -99,8 +99,8 @@ static int ath9k_hw_ar9287_check_eeprom(struct ath_hw *ah)
} }
} }
ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", ath_dbg(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
need_swap ? "True" : "False"); need_swap ? "True" : "False");
if (need_swap) if (need_swap)
el = swab16(ah->eeprom.map9287.baseEepHeader.length); el = swab16(ah->eeprom.map9287.baseEepHeader.length);
...@@ -1149,17 +1149,17 @@ static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah, ...@@ -1149,17 +1149,17 @@ static u16 ath9k_hw_ar9287_get_spur_channel(struct ath_hw *ah,
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
u16 spur_val = AR_NO_SPUR; u16 spur_val = AR_NO_SPUR;
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Getting spur idx %d is2Ghz. %d val %x\n", "Getting spur idx:%d is2Ghz:%d val:%x\n",
i, is2GHz, ah->config.spurchans[i][is2GHz]); i, is2GHz, ah->config.spurchans[i][is2GHz]);
switch (ah->config.spurmode) { switch (ah->config.spurmode) {
case SPUR_DISABLE: case SPUR_DISABLE:
break; break;
case SPUR_ENABLE_IOCTL: case SPUR_ENABLE_IOCTL:
spur_val = ah->config.spurchans[i][is2GHz]; spur_val = ah->config.spurchans[i][is2GHz];
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Getting spur val from new loc. %d\n", spur_val); "Getting spur val from new loc. %d\n", spur_val);
break; break;
case SPUR_ENABLE_EEPROM: case SPUR_ENABLE_EEPROM:
spur_val = EEP_MAP9287_SPURCHAN; spur_val = EEP_MAP9287_SPURCHAN;
......
drivers/net/wireless/ath/ath9k/eeprom_def.c
View file @ 226afe68
...@@ -122,8 +122,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah) ...@@ -122,8 +122,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
} }
if (!ath9k_hw_use_flash(ah)) { if (!ath9k_hw_use_flash(ah)) {
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"Read Magic = 0x%04X\n", magic); "Read Magic = 0x%04X\n", magic);
if (magic != AR5416_EEPROM_MAGIC) { if (magic != AR5416_EEPROM_MAGIC) {
magic2 = swab16(magic); magic2 = swab16(magic);
...@@ -146,8 +146,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah) ...@@ -146,8 +146,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
} }
} }
ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", ath_dbg(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
need_swap ? "True" : "False"); need_swap ? "True" : "False");
if (need_swap) if (need_swap)
el = swab16(ah->eeprom.def.baseEepHeader.length); el = swab16(ah->eeprom.def.baseEepHeader.length);
...@@ -168,8 +168,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah) ...@@ -168,8 +168,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
u32 integer, j; u32 integer, j;
u16 word; u16 word;
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"EEPROM Endianness is not native.. Changing.\n"); "EEPROM Endianness is not native.. Changing.\n");
word = swab16(eep->baseEepHeader.length); word = swab16(eep->baseEepHeader.length);
eep->baseEepHeader.length = word; eep->baseEepHeader.length = word;
...@@ -964,20 +964,19 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, ...@@ -964,20 +964,19 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
((pdadcValues[4 * j + 3] & 0xFF) << 24); ((pdadcValues[4 * j + 3] & 0xFF) << 24);
REG_WRITE(ah, regOffset, reg32); REG_WRITE(ah, regOffset, reg32);
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"PDADC (%d,%4x): %4.4x %8.8x\n", "PDADC (%d,%4x): %4.4x %8.8x\n",
i, regChainOffset, regOffset, i, regChainOffset, regOffset,
reg32); reg32);
ath_print(common, ATH_DBG_EEPROM, ath_dbg(common, ATH_DBG_EEPROM,
"PDADC: Chain %d | PDADC %3d " "PDADC: Chain %d | PDADC %3d "
"Value %3d | PDADC %3d Value %3d | " "Value %3d | PDADC %3d Value %3d | "
"PDADC %3d Value %3d | PDADC %3d " "PDADC %3d Value %3d | PDADC %3d "
"Value %3d |\n", "Value %3d |\n",
i, 4 * j, pdadcValues[4 * j], i, 4 * j, pdadcValues[4 * j],
4 * j + 1, pdadcValues[4 * j + 1], 4 * j + 1, pdadcValues[4 * j + 1],
4 * j + 2, pdadcValues[4 * j + 2], 4 * j + 2, pdadcValues[4 * j + 2],
4 * j + 3, 4 * j + 3, pdadcValues[4 * j + 3]);
pdadcValues[4 * j + 3]);
regOffset += 4; regOffset += 4;
} }
...@@ -1317,8 +1316,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah, ...@@ -1317,8 +1316,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN; regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
break; break;
default: default:
ath_print(ath9k_hw_common(ah), ATH_DBG_EEPROM, ath_dbg(ath9k_hw_common(ah), ATH_DBG_EEPROM,
"Invalid chainmask configuration\n"); "Invalid chainmask configuration\n");
break; break;
} }
...@@ -1459,17 +1458,17 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz) ...@@ -1459,17 +1458,17 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
u16 spur_val = AR_NO_SPUR; u16 spur_val = AR_NO_SPUR;
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Getting spur idx %d is2Ghz. %d val %x\n", "Getting spur idx:%d is2Ghz:%d val:%x\n",
i, is2GHz, ah->config.spurchans[i][is2GHz]); i, is2GHz, ah->config.spurchans[i][is2GHz]);
switch (ah->config.spurmode) { switch (ah->config.spurmode) {
case SPUR_DISABLE: case SPUR_DISABLE:
break; break;
case SPUR_ENABLE_IOCTL: case SPUR_ENABLE_IOCTL:
spur_val = ah->config.spurchans[i][is2GHz]; spur_val = ah->config.spurchans[i][is2GHz];
ath_print(common, ATH_DBG_ANI, ath_dbg(common, ATH_DBG_ANI,
"Getting spur val from new loc. %d\n", spur_val); "Getting spur val from new loc. %d\n", spur_val);
break; break;
case SPUR_ENABLE_EEPROM: case SPUR_ENABLE_EEPROM:
spur_val = EEP_DEF_SPURCHAN; spur_val = EEP_DEF_SPURCHAN;
......
drivers/net/wireless/ath/ath9k/gpio.c
View file @ 226afe68
...@@ -236,13 +236,13 @@ static void ath_detect_bt_priority(struct ath_softc *sc) ...@@ -236,13 +236,13 @@ static void ath_detect_bt_priority(struct ath_softc *sc)
sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN); sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN);
/* Detect if colocated bt started scanning */ /* Detect if colocated bt started scanning */
if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) { if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX, ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
"BT scan detected"); "BT scan detected\n");
sc->sc_flags |= (SC_OP_BT_SCAN | sc->sc_flags |= (SC_OP_BT_SCAN |
SC_OP_BT_PRIORITY_DETECTED); SC_OP_BT_PRIORITY_DETECTED);
} else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) { } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX, ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
"BT priority traffic detected"); "BT priority traffic detected\n");
sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED; sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
} }
...@@ -331,8 +331,8 @@ static void ath_btcoex_no_stomp_timer(void *arg) ...@@ -331,8 +331,8 @@ static void ath_btcoex_no_stomp_timer(void *arg)
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
bool is_btscan = sc->sc_flags & SC_OP_BT_SCAN; bool is_btscan = sc->sc_flags & SC_OP_BT_SCAN;
ath_print(common, ATH_DBG_BTCOEX, ath_dbg(common, ATH_DBG_BTCOEX,
"no stomp timer running\n"); "no stomp timer running\n");
spin_lock_bh(&btcoex->btcoex_lock); spin_lock_bh(&btcoex->btcoex_lock);
...@@ -378,8 +378,8 @@ void ath9k_btcoex_timer_resume(struct ath_softc *sc) ...@@ -378,8 +378,8 @@ void ath9k_btcoex_timer_resume(struct ath_softc *sc)
struct ath_btcoex *btcoex = &sc->btcoex; struct ath_btcoex *btcoex = &sc->btcoex;
struct ath_hw *ah = sc->sc_ah; struct ath_hw *ah = sc->sc_ah;
ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX, ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
"Starting btcoex timers"); "Starting btcoex timers\n");
/* make sure duty cycle timer is also stopped when resuming */ /* make sure duty cycle timer is also stopped when resuming */
if (btcoex->hw_timer_enabled) if (btcoex->hw_timer_enabled)
......
drivers/net/wireless/ath/ath9k/htc_drv_beacon.c
View file @ 226afe68
...@@ -123,11 +123,11 @@ static void ath9k_htc_beacon_config_sta(struct ath9k_htc_priv *priv, ...@@ -123,11 +123,11 @@ static void ath9k_htc_beacon_config_sta(struct ath9k_htc_priv *priv,
/* TSF out of range threshold fixed at 1 second */ /* TSF out of range threshold fixed at 1 second */
bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
ath_print(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); ath_dbg(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
bs.bs_bmissthreshold, bs.bs_sleepduration, bs.bs_bmissthreshold, bs.bs_sleepduration,
bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
/* Set the computed STA beacon timers */ /* Set the computed STA beacon timers */
...@@ -154,9 +154,9 @@ static void ath9k_htc_beacon_config_adhoc(struct ath9k_htc_priv *priv, ...@@ -154,9 +154,9 @@ static void ath9k_htc_beacon_config_adhoc(struct ath9k_htc_priv *priv,
if (priv->op_flags & OP_ENABLE_BEACON) if (priv->op_flags & OP_ENABLE_BEACON)
imask |= ATH9K_INT_SWBA; imask |= ATH9K_INT_SWBA;
ath_print(common, ATH_DBG_BEACON, ath_dbg(common, ATH_DBG_BEACON,
"IBSS Beacon config, intval: %d, imask: 0x%x\n", "IBSS Beacon config, intval: %d, imask: 0x%x\n",
bss_conf->beacon_interval, imask); bss_conf->beacon_interval, imask);
WMI_CMD(WMI_DISABLE_INTR_CMDID); WMI_CMD(WMI_DISABLE_INTR_CMDID);
ath9k_hw_beaconinit(priv->ah, nexttbtt, intval); ath9k_hw_beaconinit(priv->ah, nexttbtt, intval);
...@@ -278,8 +278,8 @@ void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv, ...@@ -278,8 +278,8 @@ void ath9k_htc_beacon_config(struct ath9k_htc_priv *priv,
ath9k_htc_beacon_config_adhoc(priv, cur_conf); ath9k_htc_beacon_config_adhoc(priv, cur_conf);
break; break;
default: default:
ath_print(common, ATH_DBG_CONFIG, ath_dbg(common, ATH_DBG_CONFIG,
"Unsupported beaconing mode\n"); "Unsupported beaconing mode\n");
return; return;
} }
} }
drivers/net/wireless/ath/ath9k/htc_drv_gpio.c
View file @ 226afe68
...@@ -20,13 +20,13 @@ static void ath_detect_bt_priority(struct ath9k_htc_priv *priv) ...@@ -20,13 +20,13 @@ static void ath_detect_bt_priority(struct ath9k_htc_priv *priv)
priv->op_flags &= ~(OP_BT_PRIORITY_DETECTED | OP_BT_SCAN); priv->op_flags &= ~(OP_BT_PRIORITY_DETECTED | OP_BT_SCAN);
/* Detect if colocated bt started scanning */ /* Detect if colocated bt started scanning */
if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) { if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX, ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
"BT scan detected"); "BT scan detected\n");
priv->op_flags |= (OP_BT_SCAN | priv->op_flags |= (OP_BT_SCAN |
OP_BT_PRIORITY_DETECTED); OP_BT_PRIORITY_DETECTED);
} else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) { } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX, ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
"BT priority traffic detected"); "BT priority traffic detected\n");
priv->op_flags |= OP_BT_PRIORITY_DETECTED; priv->op_flags |= OP_BT_PRIORITY_DETECTED;
} }
...@@ -83,8 +83,8 @@ static void ath_btcoex_duty_cycle_work(struct work_struct *work) ...@@ -83,8 +83,8 @@ static void ath_btcoex_duty_cycle_work(struct work_struct *work)
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
bool is_btscan = priv->op_flags & OP_BT_SCAN; bool is_btscan = priv->op_flags & OP_BT_SCAN;
ath_print(common, ATH_DBG_BTCOEX, ath_dbg(common, ATH_DBG_BTCOEX,
"time slice work for bt and wlan\n"); "time slice work for bt and wlan\n");
if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || is_btscan) if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || is_btscan)
ath9k_cmn_btcoex_bt_stomp(common, ATH_BTCOEX_STOMP_NONE); ath9k_cmn_btcoex_bt_stomp(common, ATH_BTCOEX_STOMP_NONE);
...@@ -114,8 +114,7 @@ void ath_htc_resume_btcoex_work(struct ath9k_htc_priv *priv) ...@@ -114,8 +114,7 @@ void ath_htc_resume_btcoex_work(struct ath9k_htc_priv *priv)
struct ath_btcoex *btcoex = &priv->btcoex; struct ath_btcoex *btcoex = &priv->btcoex;
struct ath_hw *ah = priv->ah; struct ath_hw *ah = priv->ah;
ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX, ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX, "Starting btcoex work\n");
"Starting btcoex work");
btcoex->bt_priority_cnt = 0; btcoex->bt_priority_cnt = 0;
btcoex->bt_priority_time = jiffies; btcoex->bt_priority_time = jiffies;
......
drivers/net/wireless/ath/ath9k/htc_drv_init.c
View file @ 226afe68
...@@ -288,9 +288,9 @@ static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) ...@@ -288,9 +288,9 @@ static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
(u8 *) &val, sizeof(val), (u8 *) &val, sizeof(val),
100); 100);
if (unlikely(r)) { if (unlikely(r)) {
ath_print(common, ATH_DBG_WMI, ath_dbg(common, ATH_DBG_WMI,
"REGISTER READ FAILED: (0x%04x, %d)\n", "REGISTER READ FAILED: (0x%04x, %d)\n",
reg_offset, r); reg_offset, r);
return -EIO; return -EIO;
} }
...@@ -313,9 +313,9 @@ static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) ...@@ -313,9 +313,9 @@ static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
(u8 *) &val, sizeof(val), (u8 *) &val, sizeof(val),
100); 100);
if (unlikely(r)) { if (unlikely(r)) {
ath_print(common, ATH_DBG_WMI, ath_dbg(common, ATH_DBG_WMI,
"REGISTER WRITE FAILED:(0x%04x, %d)\n", "REGISTER WRITE FAILED:(0x%04x, %d)\n",
reg_offset, r); reg_offset, r);
} }
} }
...@@ -345,9 +345,9 @@ static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) ...@@ -345,9 +345,9 @@ static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
(u8 *) &rsp_status, sizeof(rsp_status), (u8 *) &rsp_status, sizeof(rsp_status),
100); 100);
if (unlikely(r)) { if (unlikely(r)) {
ath_print(common, ATH_DBG_WMI, ath_dbg(common, ATH_DBG_WMI,
"REGISTER WRITE FAILED, multi len: %d\n", "REGISTER WRITE FAILED, multi len: %d\n",
priv->wmi->multi_write_idx); priv->wmi->multi_write_idx);
} }
priv->wmi->multi_write_idx = 0; priv->wmi->multi_write_idx = 0;
} }
...@@ -395,9 +395,9 @@ static void ath9k_regwrite_flush(void *hw_priv) ...@@ -395,9 +395,9 @@ static void ath9k_regwrite_flush(void *hw_priv)
(u8 *) &rsp_status, sizeof(rsp_status), (u8 *) &rsp_status, sizeof(rsp_status),
100); 100);
if (unlikely(r)) { if (unlikely(r)) {
ath_print(common, ATH_DBG_WMI, ath_dbg(common, ATH_DBG_WMI,
"REGISTER WRITE FAILED, multi len: %d\n", "REGISTER WRITE FAILED, multi len: %d\n",
priv->wmi->multi_write_idx); priv->wmi->multi_write_idx);
} }
priv->wmi->multi_write_idx = 0; priv->wmi->multi_write_idx = 0;
} }
...@@ -469,9 +469,9 @@ static void setup_ht_cap(struct ath9k_htc_priv *priv, ...@@ -469,9 +469,9 @@ static void setup_ht_cap(struct ath9k_htc_priv *priv,
tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2); tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2); rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
ath_print(common, ATH_DBG_CONFIG, ath_dbg(common, ATH_DBG_CONFIG,
"TX streams %d, RX streams: %d\n", "TX streams %d, RX streams: %d\n",
tx_streams, rx_streams); tx_streams, rx_streams);
if (tx_streams != rx_streams) { if (tx_streams != rx_streams) {
ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
...@@ -537,9 +537,9 @@ static void ath9k_init_crypto(struct ath9k_htc_priv *priv) ...@@ -537,9 +537,9 @@ static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
/* Get the hardware key cache size. */ /* Get the hardware key cache size. */
common->keymax = priv->ah->caps.keycache_size; common->keymax = priv->ah->caps.keycache_size;
if (common->keymax > ATH_KEYMAX) { if (common->keymax > ATH_KEYMAX) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"Warning, using only %u entries in %u key cache\n", "Warning, using only %u entries in %u key cache\n",
ATH_KEYMAX, common->keymax); ATH_KEYMAX, common->keymax);
common->keymax = ATH_KEYMAX; common->keymax = ATH_KEYMAX;
} }
......
drivers/net/wireless/ath/ath9k/htc_drv_txrx.c
View file @ 226afe68
...@@ -270,8 +270,8 @@ void ath9k_tx_tasklet(unsigned long data) ...@@ -270,8 +270,8 @@ void ath9k_tx_tasklet(unsigned long data)
if (priv->tx_queues_stop) { if (priv->tx_queues_stop) {
priv->tx_queues_stop = false; priv->tx_queues_stop = false;
spin_unlock_bh(&priv->tx_lock); spin_unlock_bh(&priv->tx_lock);
ath_print(ath9k_hw_common(priv->ah), ATH_DBG_XMIT, ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_XMIT,
"Waking up TX queues\n"); "Waking up TX queues\n");
ieee80211_wake_queues(priv->hw); ieee80211_wake_queues(priv->hw);
return; return;
} }
...@@ -681,8 +681,8 @@ void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb, ...@@ -681,8 +681,8 @@ void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb,
spin_unlock(&priv->rx.rxbuflock); spin_unlock(&priv->rx.rxbuflock);
if (rxbuf == NULL) { if (rxbuf == NULL) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"No free RX buffer\n"); "No free RX buffer\n");
goto err; goto err;
} }
......
drivers/net/wireless/ath/ath9k/hw.c
View file @ 226afe68
...@@ -129,9 +129,9 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) ...@@ -129,9 +129,9 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
udelay(AH_TIME_QUANTUM); udelay(AH_TIME_QUANTUM);
} }
ath_print(ath9k_hw_common(ah), ATH_DBG_ANY, ath_dbg(ath9k_hw_common(ah), ATH_DBG_ANY,
"timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n", "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
timeout, reg, REG_READ(ah, reg), mask, val); timeout, reg, REG_READ(ah, reg), mask, val);
return false; return false;
} }
...@@ -465,10 +465,10 @@ static int ath9k_hw_post_init(struct ath_hw *ah) ...@@ -465,10 +465,10 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
if (ecode != 0) if (ecode != 0)
return ecode; return ecode;
ath_print(ath9k_hw_common(ah), ATH_DBG_CONFIG, ath_dbg(ath9k_hw_common(ah), ATH_DBG_CONFIG,
"Eeprom VER: %d, REV: %d\n", "Eeprom VER: %d, REV: %d\n",
ah->eep_ops->get_eeprom_ver(ah), ah->eep_ops->get_eeprom_ver(ah),
ah->eep_ops->get_eeprom_rev(ah)); ah->eep_ops->get_eeprom_rev(ah));
ecode = ath9k_hw_rf_alloc_ext_banks(ah); ecode = ath9k_hw_rf_alloc_ext_banks(ah);
if (ecode) { if (ecode) {
...@@ -530,7 +530,7 @@ static int __ath9k_hw_init(struct ath_hw *ah) ...@@ -530,7 +530,7 @@ static int __ath9k_hw_init(struct ath_hw *ah)
} }
} }
ath_print(common, ATH_DBG_RESET, "serialize_regmode is %d\n", ath_dbg(common, ATH_DBG_RESET, "serialize_regmode is %d\n",
ah->config.serialize_regmode); ah->config.serialize_regmode);
if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
...@@ -758,8 +758,8 @@ static void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us) ...@@ -758,8 +758,8 @@ static void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu) static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
{ {
if (tu > 0xFFFF) { if (tu > 0xFFFF) {
ath_print(ath9k_hw_common(ah), ATH_DBG_XMIT, ath_dbg(ath9k_hw_common(ah), ATH_DBG_XMIT,
"bad global tx timeout %u\n", tu); "bad global tx timeout %u\n", tu);
ah->globaltxtimeout = (u32) -1; ah->globaltxtimeout = (u32) -1;
return false; return false;
} else { } else {
...@@ -776,8 +776,8 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah) ...@@ -776,8 +776,8 @@ void ath9k_hw_init_global_settings(struct ath_hw *ah)
int slottime; int slottime;
int sifstime; int sifstime;
ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n", ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
ah->misc_mode); ah->misc_mode);
if (ah->misc_mode != 0) if (ah->misc_mode != 0)
REG_WRITE(ah, AR_PCU_MISC, REG_WRITE(ah, AR_PCU_MISC,
...@@ -1020,8 +1020,8 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type) ...@@ -1020,8 +1020,8 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
REG_WRITE(ah, AR_RTC_RC, 0); REG_WRITE(ah, AR_RTC_RC, 0);
if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) { if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
"RTC stuck in MAC reset\n"); "RTC stuck in MAC reset\n");
return false; return false;
} }
...@@ -1067,8 +1067,8 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah) ...@@ -1067,8 +1067,8 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
AR_RTC_STATUS_M, AR_RTC_STATUS_M,
AR_RTC_STATUS_ON, AR_RTC_STATUS_ON,
AH_WAIT_TIMEOUT)) { AH_WAIT_TIMEOUT)) {
ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
"RTC not waking up\n"); "RTC not waking up\n");
return false; return false;
} }
...@@ -1128,9 +1128,8 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, ...@@ -1128,9 +1128,8 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
for (qnum = 0; qnum < AR_NUM_QCU; qnum++) { for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
if (ath9k_hw_numtxpending(ah, qnum)) { if (ath9k_hw_numtxpending(ah, qnum)) {
ath_print(common, ATH_DBG_QUEUE, ath_dbg(common, ATH_DBG_QUEUE,
"Transmit frames pending on " "Transmit frames pending on queue %d\n", qnum);
"queue %d\n", qnum);
return false; return false;
} }
} }
...@@ -1211,7 +1210,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -1211,7 +1210,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
if (!ah->chip_fullsleep) { if (!ah->chip_fullsleep) {
ath9k_hw_abortpcurecv(ah); ath9k_hw_abortpcurecv(ah);
if (!ath9k_hw_stopdmarecv(ah)) { if (!ath9k_hw_stopdmarecv(ah)) {
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT,
"Failed to stop receive dma\n"); "Failed to stop receive dma\n");
bChannelChange = false; bChannelChange = false;
} }
...@@ -1423,13 +1422,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, ...@@ -1423,13 +1422,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
u32 mask; u32 mask;
mask = REG_READ(ah, AR_CFG); mask = REG_READ(ah, AR_CFG);
if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) { if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"CFG Byte Swap Set 0x%x\n", mask); "CFG Byte Swap Set 0x%x\n", mask);
} else { } else {
mask = mask =
INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB; INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
REG_WRITE(ah, AR_CFG, mask); REG_WRITE(ah, AR_CFG, mask);
ath_print(common, ATH_DBG_RESET, ath_dbg(common, ATH_DBG_RESET,
"Setting CFG 0x%x\n", REG_READ(ah, AR_CFG)); "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG));
} }
} else { } else {
...@@ -1583,8 +1582,8 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode) ...@@ -1583,8 +1582,8 @@ bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
if (ah->power_mode == mode) if (ah->power_mode == mode)
return status; return status;
ath_print(common, ATH_DBG_RESET, "%s -> %s\n", ath_dbg(common, ATH_DBG_RESET, "%s -> %s\n",
modes[ah->power_mode], modes[mode]); modes[ah->power_mode], modes[mode]);
switch (mode) { switch (mode) {
case ATH9K_PM_AWAKE: case ATH9K_PM_AWAKE:
...@@ -1657,9 +1656,9 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period) ...@@ -1657,9 +1656,9 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
flags |= AR_TBTT_TIMER_EN; flags |= AR_TBTT_TIMER_EN;
break; break;
} }
ath_print(ath9k_hw_common(ah), ATH_DBG_BEACON, ath_dbg(ath9k_hw_common(ah), ATH_DBG_BEACON,
"%s: unsupported opmode: %d\n", "%s: unsupported opmode: %d\n",
__func__, ah->opmode); __func__, ah->opmode);
return; return;
break; break;
} }
...@@ -1715,10 +1714,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, ...@@ -1715,10 +1714,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
else else
nextTbtt = bs->bs_nexttbtt; nextTbtt = bs->bs_nexttbtt;
ath_print(common, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim); ath_dbg(common, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
ath_print(common, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt); ath_dbg(common, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
ath_print(common, ATH_DBG_BEACON, "beacon period %d\n", beaconintval); ath_dbg(common, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
ath_print(common, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod); ath_dbg(common, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
ENABLE_REGWRITE_BUFFER(ah); ENABLE_REGWRITE_BUFFER(ah);
...@@ -1783,8 +1782,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) ...@@ -1783,8 +1782,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
regulatory->current_rd += 5; regulatory->current_rd += 5;
else if (regulatory->current_rd == 0x41) else if (regulatory->current_rd == 0x41)
regulatory->current_rd = 0x43; regulatory->current_rd = 0x43;
ath_print(common, ATH_DBG_REGULATORY, ath_dbg(common, ATH_DBG_REGULATORY,
"regdomain mapped to 0x%x\n", regulatory->current_rd); "regdomain mapped to 0x%x\n", regulatory->current_rd);
} }
eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE); eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
...@@ -2245,8 +2244,8 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah) ...@@ -2245,8 +2244,8 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah)
{ {
if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0, if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0,
AH_TSF_WRITE_TIMEOUT)) AH_TSF_WRITE_TIMEOUT))
ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, ath_dbg(ath9k_hw_common(ah), ATH_DBG_RESET,
"AR_SLP32_TSF_WRITE_STATUS limit exceeded\n"); "AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE); REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);
} }
...@@ -2367,9 +2366,9 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah, ...@@ -2367,9 +2366,9 @@ void ath9k_hw_gen_timer_start(struct ath_hw *ah,
tsf = ath9k_hw_gettsf32(ah); tsf = ath9k_hw_gettsf32(ah);
ath_print(ath9k_hw_common(ah), ATH_DBG_HWTIMER, ath_dbg(ath9k_hw_common(ah), ATH_DBG_HWTIMER,
"curent tsf %x period %x" "current tsf %x period %x timer_next %x\n",
"timer_next %x\n", tsf, timer_period, timer_next); tsf, timer_period, timer_next);
/* /*
* Pull timer_next forward if the current TSF already passed it * Pull timer_next forward if the current TSF already passed it
...@@ -2449,8 +2448,8 @@ void ath_gen_timer_isr(struct ath_hw *ah) ...@@ -2449,8 +2448,8 @@ void ath_gen_timer_isr(struct ath_hw *ah)
index = rightmost_index(timer_table, &thresh_mask); index = rightmost_index(timer_table, &thresh_mask);
timer = timer_table->timers[index]; timer = timer_table->timers[index];
BUG_ON(!timer); BUG_ON(!timer);
ath_print(common, ATH_DBG_HWTIMER, ath_dbg(common, ATH_DBG_HWTIMER,
"TSF overflow for Gen timer %d\n", index); "TSF overflow for Gen timer %d\n", index);
timer->overflow(timer->arg); timer->overflow(timer->arg);
} }
...@@ -2458,8 +2457,8 @@ void ath_gen_timer_isr(struct ath_hw *ah) ...@@ -2458,8 +2457,8 @@ void ath_gen_timer_isr(struct ath_hw *ah)
index = rightmost_index(timer_table, &trigger_mask); index = rightmost_index(timer_table, &trigger_mask);
timer = timer_table->timers[index]; timer = timer_table->timers[index];
BUG_ON(!timer); BUG_ON(!timer);
ath_print(common, ATH_DBG_HWTIMER, ath_dbg(common, ATH_DBG_HWTIMER,
"Gen timer[%d] trigger\n", index); "Gen timer[%d] trigger\n", index);
timer->trigger(timer->arg); timer->trigger(timer->arg);
} }
} }
......
drivers/net/wireless/ath/ath9k/hw.h
View file @ 226afe68
...@@ -30,7 +30,6 @@ ...@@ -30,7 +30,6 @@
#include "btcoex.h" #include "btcoex.h"
#include "../regd.h" #include "../regd.h"
#include "../debug.h"
#define ATHEROS_VENDOR_ID 0x168c #define ATHEROS_VENDOR_ID 0x168c
......
drivers/net/wireless/ath/ath9k/init.c
View file @ 226afe68
...@@ -226,9 +226,9 @@ static void setup_ht_cap(struct ath_softc *sc, ...@@ -226,9 +226,9 @@ static void setup_ht_cap(struct ath_softc *sc,
tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, max_streams); tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, max_streams);
rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, max_streams); rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, max_streams);
ath_print(common, ATH_DBG_CONFIG, ath_dbg(common, ATH_DBG_CONFIG,
"TX streams %d, RX streams: %d\n", "TX streams %d, RX streams: %d\n",
tx_streams, rx_streams); tx_streams, rx_streams);
if (tx_streams != rx_streams) { if (tx_streams != rx_streams) {
ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
...@@ -271,8 +271,8 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, ...@@ -271,8 +271,8 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
struct ath_buf *bf; struct ath_buf *bf;
int i, bsize, error, desc_len; int i, bsize, error, desc_len;
ath_print(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n", ath_dbg(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
name, nbuf, ndesc); name, nbuf, ndesc);
INIT_LIST_HEAD(head); INIT_LIST_HEAD(head);
...@@ -317,9 +317,9 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, ...@@ -317,9 +317,9 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
goto fail; goto fail;
} }
ds = (u8 *) dd->dd_desc; ds = (u8 *) dd->dd_desc;
ath_print(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n", ath_dbg(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
name, ds, (u32) dd->dd_desc_len, name, ds, (u32) dd->dd_desc_len,
ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len); ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
/* allocate buffers */ /* allocate buffers */
bsize = sizeof(struct ath_buf) * nbuf; bsize = sizeof(struct ath_buf) * nbuf;
...@@ -373,9 +373,9 @@ static void ath9k_init_crypto(struct ath_softc *sc) ...@@ -373,9 +373,9 @@ static void ath9k_init_crypto(struct ath_softc *sc)
/* Get the hardware key cache size. */ /* Get the hardware key cache size. */
common->keymax = sc->sc_ah->caps.keycache_size; common->keymax = sc->sc_ah->caps.keycache_size;
if (common->keymax > ATH_KEYMAX) { if (common->keymax > ATH_KEYMAX) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"Warning, using only %u entries in %u key cache\n", "Warning, using only %u entries in %u key cache\n",
ATH_KEYMAX, common->keymax); ATH_KEYMAX, common->keymax);
common->keymax = ATH_KEYMAX; common->keymax = ATH_KEYMAX;
} }
......
drivers/net/wireless/ath/ath9k/mac.c
View file @ 226afe68
...@@ -20,11 +20,11 @@ ...@@ -20,11 +20,11 @@
static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah, static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah,
struct ath9k_tx_queue_info *qi) struct ath9k_tx_queue_info *qi)
{ {
ath_print(ath9k_hw_common(ah), ATH_DBG_INTERRUPT, ath_dbg(ath9k_hw_common(ah), ATH_DBG_INTERRUPT,
"tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n", "tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n",
ah->txok_interrupt_mask, ah->txerr_interrupt_mask, ah->txok_interrupt_mask, ah->txerr_interrupt_mask,
ah->txdesc_interrupt_mask, ah->txeol_interrupt_mask, ah->txdesc_interrupt_mask, ah->txeol_interrupt_mask,
ah->txurn_interrupt_mask); ah->txurn_interrupt_mask);
ENABLE_REGWRITE_BUFFER(ah); ENABLE_REGWRITE_BUFFER(ah);
...@@ -56,8 +56,8 @@ EXPORT_SYMBOL(ath9k_hw_puttxbuf); ...@@ -56,8 +56,8 @@ EXPORT_SYMBOL(ath9k_hw_puttxbuf);
void ath9k_hw_txstart(struct ath_hw *ah, u32 q) void ath9k_hw_txstart(struct ath_hw *ah, u32 q)
{ {
ath_print(ath9k_hw_common(ah), ATH_DBG_QUEUE, ath_dbg(ath9k_hw_common(ah), ATH_DBG_QUEUE,
"Enable TXE on queue: %u\n", q); "Enable TXE on queue: %u\n", q);
REG_WRITE(ah, AR_Q_TXE, 1 << q); REG_WRITE(ah, AR_Q_TXE, 1 << q);
} }
EXPORT_SYMBOL(ath9k_hw_txstart); EXPORT_SYMBOL(ath9k_hw_txstart);
...@@ -154,15 +154,15 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q) ...@@ -154,15 +154,15 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM; u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM;
if (q >= pCap->total_queues) { if (q >= pCap->total_queues) {
ath_print(common, ATH_DBG_QUEUE, "Stopping TX DMA, " ath_dbg(common, ATH_DBG_QUEUE,
"invalid queue: %u\n", q); "Stopping TX DMA, invalid queue: %u\n", q);
return false; return false;
} }
qi = &ah->txq[q]; qi = &ah->txq[q];
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
ath_print(common, ATH_DBG_QUEUE, "Stopping TX DMA, " ath_dbg(common, ATH_DBG_QUEUE,
"inactive queue: %u\n", q); "Stopping TX DMA, inactive queue: %u\n", q);
return false; return false;
} }
...@@ -175,9 +175,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q) ...@@ -175,9 +175,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
} }
if (ath9k_hw_numtxpending(ah, q)) { if (ath9k_hw_numtxpending(ah, q)) {
ath_print(common, ATH_DBG_QUEUE, ath_dbg(common, ATH_DBG_QUEUE,
"%s: Num of pending TX Frames %d on Q %d\n", "%s: Num of pending TX Frames %d on Q %d\n",
__func__, ath9k_hw_numtxpending(ah, q), q); __func__, ath9k_hw_numtxpending(ah, q), q);
for (j = 0; j < 2; j++) { for (j = 0; j < 2; j++) {
tsfLow = REG_READ(ah, AR_TSF_L32); tsfLow = REG_READ(ah, AR_TSF_L32);
...@@ -191,9 +191,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q) ...@@ -191,9 +191,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
if ((REG_READ(ah, AR_TSF_L32) >> 10) == (tsfLow >> 10)) if ((REG_READ(ah, AR_TSF_L32) >> 10) == (tsfLow >> 10))
break; break;
ath_print(common, ATH_DBG_QUEUE, ath_dbg(common, ATH_DBG_QUEUE,
"TSF has moved while trying to set " "TSF has moved while trying to set quiet time TSF: 0x%08x\n",
"quiet time TSF: 0x%08x\n", tsfLow); tsfLow);
} }
REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH); REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
...@@ -238,19 +238,19 @@ bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q, ...@@ -238,19 +238,19 @@ bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
struct ath9k_tx_queue_info *qi; struct ath9k_tx_queue_info *qi;
if (q >= pCap->total_queues) { if (q >= pCap->total_queues) {
ath_print(common, ATH_DBG_QUEUE, "Set TXQ properties, " ath_dbg(common, ATH_DBG_QUEUE,
"invalid queue: %u\n", q); "Set TXQ properties, invalid queue: %u\n", q);
return false; return false;
} }
qi = &ah->txq[q]; qi = &ah->txq[q];
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
ath_print(common, ATH_DBG_QUEUE, "Set TXQ properties, " ath_dbg(common, ATH_DBG_QUEUE,
"inactive queue: %u\n", q); "Set TXQ properties, inactive queue: %u\n", q);
return false; return false;
} }
ath_print(common, ATH_DBG_QUEUE, "Set queue properties for: %u\n", q); ath_dbg(common, ATH_DBG_QUEUE, "Set queue properties for: %u\n", q);
qi->tqi_ver = qinfo->tqi_ver; qi->tqi_ver = qinfo->tqi_ver;
qi->tqi_subtype = qinfo->tqi_subtype; qi->tqi_subtype = qinfo->tqi_subtype;
...@@ -309,15 +309,15 @@ bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q, ...@@ -309,15 +309,15 @@ bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q,
struct ath9k_tx_queue_info *qi; struct ath9k_tx_queue_info *qi;
if (q >= pCap->total_queues) { if (q >= pCap->total_queues) {
ath_print(common, ATH_DBG_QUEUE, "Get TXQ properties, " ath_dbg(common, ATH_DBG_QUEUE,
"invalid queue: %u\n", q); "Get TXQ properties, invalid queue: %u\n", q);
return false; return false;
} }
qi = &ah->txq[q]; qi = &ah->txq[q];
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
ath_print(common, ATH_DBG_QUEUE, "Get TXQ properties, " ath_dbg(common, ATH_DBG_QUEUE,
"inactive queue: %u\n", q); "Get TXQ properties, inactive queue: %u\n", q);
return false; return false;
} }
...@@ -376,7 +376,7 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type, ...@@ -376,7 +376,7 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
return -1; return -1;
} }
ath_print(common, ATH_DBG_QUEUE, "Setup TX queue: %u\n", q); ath_dbg(common, ATH_DBG_QUEUE, "Setup TX queue: %u\n", q);
qi = &ah->txq[q]; qi = &ah->txq[q];
if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) { if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
...@@ -412,18 +412,18 @@ bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q) ...@@ -412,18 +412,18 @@ bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
struct ath9k_tx_queue_info *qi; struct ath9k_tx_queue_info *qi;
if (q >= pCap->total_queues) { if (q >= pCap->total_queues) {
ath_print(common, ATH_DBG_QUEUE, "Release TXQ, " ath_dbg(common, ATH_DBG_QUEUE,
"invalid queue: %u\n", q); "Release TXQ, invalid queue: %u\n", q);
return false; return false;
} }
qi = &ah->txq[q]; qi = &ah->txq[q];
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
ath_print(common, ATH_DBG_QUEUE, "Release TXQ, " ath_dbg(common, ATH_DBG_QUEUE,
"inactive queue: %u\n", q); "Release TXQ, inactive queue: %u\n", q);
return false; return false;
} }
ath_print(common, ATH_DBG_QUEUE, "Release TX queue: %u\n", q); ath_dbg(common, ATH_DBG_QUEUE, "Release TX queue: %u\n", q);
qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE; qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
ah->txok_interrupt_mask &= ~(1 << q); ah->txok_interrupt_mask &= ~(1 << q);
...@@ -446,19 +446,19 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) ...@@ -446,19 +446,19 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
u32 cwMin, chanCwMin, value; u32 cwMin, chanCwMin, value;
if (q >= pCap->total_queues) { if (q >= pCap->total_queues) {
ath_print(common, ATH_DBG_QUEUE, "Reset TXQ, " ath_dbg(common, ATH_DBG_QUEUE,
"invalid queue: %u\n", q); "Reset TXQ, invalid queue: %u\n", q);
return false; return false;
} }
qi = &ah->txq[q]; qi = &ah->txq[q];
if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
ath_print(common, ATH_DBG_QUEUE, "Reset TXQ, " ath_dbg(common, ATH_DBG_QUEUE,
"inactive queue: %u\n", q); "Reset TXQ, inactive queue: %u\n", q);
return true; return true;
} }
ath_print(common, ATH_DBG_QUEUE, "Reset TX queue: %u\n", q); ath_dbg(common, ATH_DBG_QUEUE, "Reset TX queue: %u\n", q);
if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) { if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
if (chan && IS_CHAN_B(chan)) if (chan && IS_CHAN_B(chan))
...@@ -839,7 +839,7 @@ void ath9k_hw_disable_interrupts(struct ath_hw *ah) ...@@ -839,7 +839,7 @@ void ath9k_hw_disable_interrupts(struct ath_hw *ah)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
ath_print(common, ATH_DBG_INTERRUPT, "disable IER\n"); ath_dbg(common, ATH_DBG_INTERRUPT, "disable IER\n");
REG_WRITE(ah, AR_IER, AR_IER_DISABLE); REG_WRITE(ah, AR_IER, AR_IER_DISABLE);
(void) REG_READ(ah, AR_IER); (void) REG_READ(ah, AR_IER);
if (!AR_SREV_9100(ah)) { if (!AR_SREV_9100(ah)) {
...@@ -859,7 +859,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah) ...@@ -859,7 +859,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
if (!(ah->imask & ATH9K_INT_GLOBAL)) if (!(ah->imask & ATH9K_INT_GLOBAL))
return; return;
ath_print(common, ATH_DBG_INTERRUPT, "enable IER\n"); ath_dbg(common, ATH_DBG_INTERRUPT, "enable IER\n");
REG_WRITE(ah, AR_IER, AR_IER_ENABLE); REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
if (!AR_SREV_9100(ah)) { if (!AR_SREV_9100(ah)) {
REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, REG_WRITE(ah, AR_INTR_ASYNC_ENABLE,
...@@ -872,8 +872,8 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah) ...@@ -872,8 +872,8 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
REG_WRITE(ah, AR_INTR_SYNC_MASK, REG_WRITE(ah, AR_INTR_SYNC_MASK,
AR_INTR_SYNC_DEFAULT); AR_INTR_SYNC_DEFAULT);
} }
ath_print(common, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n", ath_dbg(common, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n",
REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER)); REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER));
} }
EXPORT_SYMBOL(ath9k_hw_enable_interrupts); EXPORT_SYMBOL(ath9k_hw_enable_interrupts);
...@@ -887,7 +887,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints) ...@@ -887,7 +887,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
if (!(ints & ATH9K_INT_GLOBAL)) if (!(ints & ATH9K_INT_GLOBAL))
ath9k_hw_enable_interrupts(ah); ath9k_hw_enable_interrupts(ah);
ath_print(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints); ath_dbg(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
/* TODO: global int Ref count */ /* TODO: global int Ref count */
mask = ints & ATH9K_INT_COMMON; mask = ints & ATH9K_INT_COMMON;
...@@ -948,7 +948,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints) ...@@ -948,7 +948,7 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
mask2 |= AR_IMR_S2_CST; mask2 |= AR_IMR_S2_CST;
} }
ath_print(common, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask); ath_dbg(common, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask);
REG_WRITE(ah, AR_IMR, mask); REG_WRITE(ah, AR_IMR, mask);
ah->imrs2_reg &= ~(AR_IMR_S2_TIM | AR_IMR_S2_DTIM | AR_IMR_S2_DTIMSYNC | ah->imrs2_reg &= ~(AR_IMR_S2_TIM | AR_IMR_S2_DTIM | AR_IMR_S2_DTIMSYNC |
AR_IMR_S2_CABEND | AR_IMR_S2_CABTO | AR_IMR_S2_CABEND | AR_IMR_S2_CABTO |
......
drivers/net/wireless/ath/ath9k/main.c
View file @ 226afe68
This diff is collapsed.
drivers/net/wireless/ath/ath9k/rc.c
View file @ 226afe68
...@@ -1184,7 +1184,7 @@ struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc, ...@@ -1184,7 +1184,7 @@ struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc,
return &ar5416_11na_ratetable; return &ar5416_11na_ratetable;
return &ar5416_11a_ratetable; return &ar5416_11a_ratetable;
default: default:
ath_print(common, ATH_DBG_CONFIG, "Invalid band\n"); ath_dbg(common, ATH_DBG_CONFIG, "Invalid band\n");
return NULL; return NULL;
} }
} }
...@@ -1259,9 +1259,9 @@ static void ath_rc_init(struct ath_softc *sc, ...@@ -1259,9 +1259,9 @@ static void ath_rc_init(struct ath_softc *sc,
ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4];
ath_rc_priv->rate_table = rate_table; ath_rc_priv->rate_table = rate_table;
ath_print(common, ATH_DBG_CONFIG, ath_dbg(common, ATH_DBG_CONFIG,
"RC Initialized with capabilities: 0x%x\n", "RC Initialized with capabilities: 0x%x\n",
ath_rc_priv->ht_cap); ath_rc_priv->ht_cap);
} }
static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta, static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta,
...@@ -1463,9 +1463,9 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, ...@@ -1463,9 +1463,9 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
oper_cw40, oper_sgi); oper_cw40, oper_sgi);
ath_rc_init(sc, priv_sta, sband, sta, rate_table); ath_rc_init(sc, priv_sta, sband, sta, rate_table);
ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
"Operating HT Bandwidth changed to: %d\n", "Operating HT Bandwidth changed to: %d\n",
sc->hw->conf.channel_type); sc->hw->conf.channel_type);
} }
} }
} }
......
drivers/net/wireless/ath/ath9k/recv.c
View file @ 226afe68
...@@ -165,7 +165,7 @@ static void ath_rx_addbuffer_edma(struct ath_softc *sc, ...@@ -165,7 +165,7 @@ static void ath_rx_addbuffer_edma(struct ath_softc *sc,
u32 nbuf = 0; u32 nbuf = 0;
if (list_empty(&sc->rx.rxbuf)) { if (list_empty(&sc->rx.rxbuf)) {
ath_print(common, ATH_DBG_QUEUE, "No free rx buf available\n"); ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
return; return;
} }
...@@ -327,8 +327,8 @@ int ath_rx_init(struct ath_softc *sc, int nbufs) ...@@ -327,8 +327,8 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN, common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
min(common->cachelsz, (u16)64)); min(common->cachelsz, (u16)64));
ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
common->cachelsz, common->rx_bufsize); common->cachelsz, common->rx_bufsize);
/* Initialize rx descriptors */ /* Initialize rx descriptors */
...@@ -590,9 +590,8 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) ...@@ -590,9 +590,8 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
if (sc->ps_flags & PS_BEACON_SYNC) { if (sc->ps_flags & PS_BEACON_SYNC) {
sc->ps_flags &= ~PS_BEACON_SYNC; sc->ps_flags &= ~PS_BEACON_SYNC;
ath_print(common, ATH_DBG_PS, ath_dbg(common, ATH_DBG_PS,
"Reconfigure Beacon timers based on " "Reconfigure Beacon timers based on timestamp from the AP\n");
"timestamp from the AP\n");
ath_beacon_config(sc, NULL); ath_beacon_config(sc, NULL);
} }
...@@ -604,8 +603,8 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) ...@@ -604,8 +603,8 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
* a backup trigger for returning into NETWORK SLEEP state, * a backup trigger for returning into NETWORK SLEEP state,
* so we are waiting for it as well. * so we are waiting for it as well.
*/ */
ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating " ath_dbg(common, ATH_DBG_PS,
"buffered broadcast/multicast frame(s)\n"); "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON; sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
return; return;
} }
...@@ -617,8 +616,8 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) ...@@ -617,8 +616,8 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
* been delivered. * been delivered.
*/ */
sc->ps_flags &= ~PS_WAIT_FOR_CAB; sc->ps_flags &= ~PS_WAIT_FOR_CAB;
ath_print(common, ATH_DBG_PS, ath_dbg(common, ATH_DBG_PS,
"PS wait for CAB frames timed out\n"); "PS wait for CAB frames timed out\n");
} }
} }
...@@ -643,15 +642,14 @@ static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb) ...@@ -643,15 +642,14 @@ static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
* point. * point.
*/ */
sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON); sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
ath_print(common, ATH_DBG_PS, ath_dbg(common, ATH_DBG_PS,
"All PS CAB frames received, back to sleep\n"); "All PS CAB frames received, back to sleep\n");
} else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) && } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
!is_multicast_ether_addr(hdr->addr1) && !is_multicast_ether_addr(hdr->addr1) &&
!ieee80211_has_morefrags(hdr->frame_control)) { !ieee80211_has_morefrags(hdr->frame_control)) {
sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA; sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
ath_print(common, ATH_DBG_PS, ath_dbg(common, ATH_DBG_PS,
"Going back to sleep after having received " "Going back to sleep after having received PS-Poll data (0x%lx)\n",
"PS-Poll data (0x%lx)\n",
sc->ps_flags & (PS_WAIT_FOR_BEACON | sc->ps_flags & (PS_WAIT_FOR_BEACON |
PS_WAIT_FOR_CAB | PS_WAIT_FOR_CAB |
PS_WAIT_FOR_PSPOLL_DATA | PS_WAIT_FOR_PSPOLL_DATA |
...@@ -953,8 +951,9 @@ static int ath9k_process_rate(struct ath_common *common, ...@@ -953,8 +951,9 @@ static int ath9k_process_rate(struct ath_common *common,
* No valid hardware bitrate found -- we should not get here * No valid hardware bitrate found -- we should not get here
* because hardware has already validated this frame as OK. * because hardware has already validated this frame as OK.
*/ */
ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected " ath_dbg(common, ATH_DBG_XMIT,
"0x%02x using 1 Mbit\n", rx_stats->rs_rate); "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
rx_stats->rs_rate);
return -EINVAL; return -EINVAL;
} }
......
drivers/net/wireless/ath/ath9k/virtual.c
View file @ 226afe68
...@@ -656,10 +656,9 @@ void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle) ...@@ -656,10 +656,9 @@ void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle)
struct ath_softc *sc = aphy->sc; struct ath_softc *sc = aphy->sc;
aphy->idle = idle; aphy->idle = idle;
ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG, ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
"Marking %s as %s\n", "Marking %s as %sidle\n",
wiphy_name(aphy->hw->wiphy), wiphy_name(aphy->hw->wiphy), idle ? "" : "not-");
idle ? "idle" : "not-idle");
} }
/* Only bother starting a queue on an active virtual wiphy */ /* Only bother starting a queue on an active virtual wiphy */
bool ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue) bool ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue)
......
drivers/net/wireless/ath/ath9k/wmi.c
View file @ 226afe68
...@@ -125,7 +125,7 @@ void ath9k_wmi_tasklet(unsigned long data) ...@@ -125,7 +125,7 @@ void ath9k_wmi_tasklet(unsigned long data)
struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data; struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
struct ath_common *common = ath9k_hw_common(priv->ah); struct ath_common *common = ath9k_hw_common(priv->ah);
ath_print(common, ATH_DBG_WMI, "SWBA Event received\n"); ath_dbg(common, ATH_DBG_WMI, "SWBA Event received\n");
ath9k_htc_swba(priv, priv->wmi->beacon_pending); ath9k_htc_swba(priv, priv->wmi->beacon_pending);
...@@ -286,9 +286,9 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id, ...@@ -286,9 +286,9 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
time_left = wait_for_completion_timeout(&wmi->cmd_wait, timeout); time_left = wait_for_completion_timeout(&wmi->cmd_wait, timeout);
if (!time_left) { if (!time_left) {
ath_print(common, ATH_DBG_WMI, ath_dbg(common, ATH_DBG_WMI,
"Timeout waiting for WMI command: %s\n", "Timeout waiting for WMI command: %s\n",
wmi_cmd_to_name(cmd_id)); wmi_cmd_to_name(cmd_id));
mutex_unlock(&wmi->op_mutex); mutex_unlock(&wmi->op_mutex);
return -ETIMEDOUT; return -ETIMEDOUT;
} }
...@@ -298,8 +298,8 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id, ...@@ -298,8 +298,8 @@ int ath9k_wmi_cmd(struct wmi *wmi, enum wmi_cmd_id cmd_id,
return 0; return 0;
out: out:
ath_print(common, ATH_DBG_WMI, ath_dbg(common, ATH_DBG_WMI,
"WMI failure for: %s\n", wmi_cmd_to_name(cmd_id)); "WMI failure for: %s\n", wmi_cmd_to_name(cmd_id));
mutex_unlock(&wmi->op_mutex); mutex_unlock(&wmi->op_mutex);
kfree_skb(skb); kfree_skb(skb);
......
drivers/net/wireless/ath/ath9k/xmit.c
View file @ 226afe68
...@@ -1285,8 +1285,8 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, ...@@ -1285,8 +1285,8 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
bf = list_first_entry(head, struct ath_buf, list); bf = list_first_entry(head, struct ath_buf, list);
ath_print(common, ATH_DBG_QUEUE, ath_dbg(common, ATH_DBG_QUEUE,
"qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth); "qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth);
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
if (txq->axq_depth >= ATH_TXFIFO_DEPTH) { if (txq->axq_depth >= ATH_TXFIFO_DEPTH) {
...@@ -1294,32 +1294,29 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq, ...@@ -1294,32 +1294,29 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
return; return;
} }
if (!list_empty(&txq->txq_fifo[txq->txq_headidx])) if (!list_empty(&txq->txq_fifo[txq->txq_headidx]))
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT,
"Initializing tx fifo %d which " "Initializing tx fifo %d which is non-empty\n",
"is non-empty\n", txq->txq_headidx);
txq->txq_headidx);
INIT_LIST_HEAD(&txq->txq_fifo[txq->txq_headidx]); INIT_LIST_HEAD(&txq->txq_fifo[txq->txq_headidx]);
list_splice_init(head, &txq->txq_fifo[txq->txq_headidx]); list_splice_init(head, &txq->txq_fifo[txq->txq_headidx]);
INCR(txq->txq_headidx, ATH_TXFIFO_DEPTH); INCR(txq->txq_headidx, ATH_TXFIFO_DEPTH);
ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT, "TXDP[%u] = %llx (%p)\n",
"TXDP[%u] = %llx (%p)\n", txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
} else { } else {
list_splice_tail_init(head, &txq->axq_q); list_splice_tail_init(head, &txq->axq_q);
if (txq->axq_link == NULL) { if (txq->axq_link == NULL) {
ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT, "TXDP[%u] = %llx (%p)\n",
"TXDP[%u] = %llx (%p)\n", txq->axq_qnum, ito64(bf->bf_daddr),
txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
bf->bf_desc);
} else { } else {
*txq->axq_link = bf->bf_daddr; *txq->axq_link = bf->bf_daddr;
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT,
"link[%u] (%p)=%llx (%p)\n", "link[%u] (%p)=%llx (%p)\n",
txq->axq_qnum, txq->axq_link, txq->axq_qnum, txq->axq_link,
ito64(bf->bf_daddr), bf->bf_desc); ito64(bf->bf_daddr), bf->bf_desc);
} }
ath9k_hw_get_desc_link(ah, bf->bf_lastbf->bf_desc, ath9k_hw_get_desc_link(ah, bf->bf_lastbf->bf_desc,
&txq->axq_link); &txq->axq_link);
...@@ -1646,7 +1643,7 @@ static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw, ...@@ -1646,7 +1643,7 @@ static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw,
bf = ath_tx_get_buffer(sc); bf = ath_tx_get_buffer(sc);
if (!bf) { if (!bf) {
ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n"); ath_dbg(common, ATH_DBG_XMIT, "TX buffers are full\n");
return NULL; return NULL;
} }
...@@ -1809,7 +1806,7 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, ...@@ -1809,7 +1806,7 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data; struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data;
int q, padpos, padsize; int q, padpos, padsize;
ath_print(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb); ath_dbg(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb);
if (aphy) if (aphy)
hw = aphy->hw; hw = aphy->hw;
...@@ -1835,9 +1832,8 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, ...@@ -1835,9 +1832,8 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
if (sc->ps_flags & PS_WAIT_FOR_TX_ACK) { if (sc->ps_flags & PS_WAIT_FOR_TX_ACK) {
sc->ps_flags &= ~PS_WAIT_FOR_TX_ACK; sc->ps_flags &= ~PS_WAIT_FOR_TX_ACK;
ath_print(common, ATH_DBG_PS, ath_dbg(common, ATH_DBG_PS,
"Going back to sleep after having " "Going back to sleep after having received TX status (0x%lx)\n",
"received TX status (0x%lx)\n",
sc->ps_flags & (PS_WAIT_FOR_BEACON | sc->ps_flags & (PS_WAIT_FOR_BEACON |
PS_WAIT_FOR_CAB | PS_WAIT_FOR_CAB |
PS_WAIT_FOR_PSPOLL_DATA | PS_WAIT_FOR_PSPOLL_DATA |
...@@ -1986,9 +1982,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) ...@@ -1986,9 +1982,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
int status; int status;
int qnum; int qnum;
ath_print(common, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n", ath_dbg(common, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n",
txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum), txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum),
txq->axq_link); txq->axq_link);
for (;;) { for (;;) {
spin_lock_bh(&txq->axq_lock); spin_lock_bh(&txq->axq_lock);
...@@ -2103,8 +2099,8 @@ static void ath_tx_complete_poll_work(struct work_struct *work) ...@@ -2103,8 +2099,8 @@ static void ath_tx_complete_poll_work(struct work_struct *work)
} }
if (needreset) { if (needreset) {
ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET, ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
"tx hung, resetting the chip\n"); "tx hung, resetting the chip\n");
ath9k_ps_wakeup(sc); ath9k_ps_wakeup(sc);
ath_reset(sc, true); ath_reset(sc, true);
ath9k_ps_restore(sc); ath9k_ps_restore(sc);
...@@ -2146,8 +2142,8 @@ void ath_tx_edma_tasklet(struct ath_softc *sc) ...@@ -2146,8 +2142,8 @@ void ath_tx_edma_tasklet(struct ath_softc *sc)
if (status == -EINPROGRESS) if (status == -EINPROGRESS)
break; break;
if (status == -EIO) { if (status == -EIO) {
ath_print(common, ATH_DBG_XMIT, ath_dbg(common, ATH_DBG_XMIT,
"Error processing tx status\n"); "Error processing tx status\n");
break; break;
} }
......
drivers/net/wireless/ath/debug.h deleted 100644 → 0
View file @ 3800276a
/*
* Copyright (c) 2008-2009 Atheros Communications Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef ATH_DEBUG_H
#define ATH_DEBUG_H
#define ath_print ath_dbg
#endif /* ATH_DEBUG_H */
drivers/net/wireless/ath/key.c
View file @ 226afe68
...@@ -20,7 +20,6 @@ ...@@ -20,7 +20,6 @@
#include "ath.h" #include "ath.h"
#include "reg.h" #include "reg.h"
#include "debug.h"
#define REG_READ (common->ops->read) #define REG_READ (common->ops->read)
#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg) #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
...@@ -125,8 +124,8 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, ...@@ -125,8 +124,8 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry,
break; break;
case ATH_CIPHER_AES_CCM: case ATH_CIPHER_AES_CCM:
if (!(common->crypt_caps & ATH_CRYPT_CAP_CIPHER_AESCCM)) { if (!(common->crypt_caps & ATH_CRYPT_CAP_CIPHER_AESCCM)) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"AES-CCM not supported by this mac rev\n"); "AES-CCM not supported by this mac rev\n");
return false; return false;
} }
keyType = AR_KEYTABLE_TYPE_CCM; keyType = AR_KEYTABLE_TYPE_CCM;
...@@ -134,15 +133,15 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry, ...@@ -134,15 +133,15 @@ static bool ath_hw_set_keycache_entry(struct ath_common *common, u16 entry,
case ATH_CIPHER_TKIP: case ATH_CIPHER_TKIP:
keyType = AR_KEYTABLE_TYPE_TKIP; keyType = AR_KEYTABLE_TYPE_TKIP;
if (entry + 64 >= common->keymax) { if (entry + 64 >= common->keymax) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"entry %u inappropriate for TKIP\n", entry); "entry %u inappropriate for TKIP\n", entry);
return false; return false;
} }
break; break;
case ATH_CIPHER_WEP: case ATH_CIPHER_WEP:
if (k->kv_len < WLAN_KEY_LEN_WEP40) { if (k->kv_len < WLAN_KEY_LEN_WEP40) {
ath_print(common, ATH_DBG_ANY, ath_dbg(common, ATH_DBG_ANY,
"WEP key length %u too small\n", k->kv_len); "WEP key length %u too small\n", k->kv_len);
return false; return false;
} }
if (k->kv_len <= WLAN_KEY_LEN_WEP40) if (k->kv_len <= WLAN_KEY_LEN_WEP40)
......
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