Commit 22a2c8e0 authored by Dhinakaran Pandiyan's avatar Dhinakaran Pandiyan Committed by Ville Syrjälä

drm/i915: Validate mode against max. link data rate for DP MST

Not validating the mode rate against max. link rate results in not pruning
invalid modes. For e.g, a HBR2 5.4 Gbps 2-lane configuration does not
support 4k@60Hz. But, we do not reject this mode.

So, make use of the helpers in intel_dp to validate mode data rate against
max. link data rate of a configuration.

v3: Renamed local variables again for consistency (Manasi)
v2: Renamed mode data rate local variable to be more explanatory.
Signed-off-by: default avatarDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1479243546-17189-1-git-send-email-dhinakaran.pandiyan@intel.comSigned-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
parent fd81c44e
...@@ -161,14 +161,14 @@ static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) ...@@ -161,14 +161,14 @@ static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp)
return min(source_max, sink_max); return min(source_max, sink_max);
} }
static int int
intel_dp_link_required(int pixel_clock, int bpp) intel_dp_link_required(int pixel_clock, int bpp)
{ {
/* pixel_clock is in kHz, divide bpp by 8 for bit to Byte conversion */ /* pixel_clock is in kHz, divide bpp by 8 for bit to Byte conversion */
return DIV_ROUND_UP(pixel_clock * bpp, 8); return DIV_ROUND_UP(pixel_clock * bpp, 8);
} }
static int int
intel_dp_max_data_rate(int max_link_clock, int max_lanes) intel_dp_max_data_rate(int max_link_clock, int max_lanes)
{ {
/* max_link_clock is the link symbol clock (LS_Clk) in kHz and not the /* max_link_clock is the link symbol clock (LS_Clk) in kHz and not the
......
...@@ -350,7 +350,17 @@ static enum drm_mode_status ...@@ -350,7 +350,17 @@ static enum drm_mode_status
intel_dp_mst_mode_valid(struct drm_connector *connector, intel_dp_mst_mode_valid(struct drm_connector *connector,
struct drm_display_mode *mode) struct drm_display_mode *mode)
{ {
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
int bpp = 24; /* MST uses fixed bpp */
int max_rate, mode_rate, max_lanes, max_link_clock;
max_link_clock = intel_dp_max_link_rate(intel_dp);
max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
mode_rate = intel_dp_link_required(mode->clock, bpp);
/* TODO - validate mode against available PBN for link */ /* TODO - validate mode against available PBN for link */
if (mode->clock < 10000) if (mode->clock < 10000)
...@@ -359,7 +369,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector, ...@@ -359,7 +369,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
if (mode->flags & DRM_MODE_FLAG_DBLCLK) if (mode->flags & DRM_MODE_FLAG_DBLCLK)
return MODE_H_ILLEGAL; return MODE_H_ILLEGAL;
if (mode->clock > max_dotclk) if (mode_rate > max_rate || mode->clock > max_dotclk)
return MODE_CLOCK_HIGH; return MODE_CLOCK_HIGH;
return MODE_OK; return MODE_OK;
......
...@@ -1457,6 +1457,8 @@ bool intel_dp_read_dpcd(struct intel_dp *intel_dp); ...@@ -1457,6 +1457,8 @@ bool intel_dp_read_dpcd(struct intel_dp *intel_dp);
bool __intel_dp_read_desc(struct intel_dp *intel_dp, bool __intel_dp_read_desc(struct intel_dp *intel_dp,
struct intel_dp_desc *desc); struct intel_dp_desc *desc);
bool intel_dp_read_desc(struct intel_dp *intel_dp); bool intel_dp_read_desc(struct intel_dp *intel_dp);
int intel_dp_link_required(int pixel_clock, int bpp);
int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
/* intel_dp_aux_backlight.c */ /* intel_dp_aux_backlight.c */
int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector); int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector);
......
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