Commit 22e0c142 authored by Mark Brown's avatar Mark Brown

Merge remote-tracking branches 'asoc/fix/alc5623', 'asoc/fix/cs42l52',...

Merge remote-tracking branches 'asoc/fix/alc5623', 'asoc/fix/cs42l52', 'asoc/fix/cs42l73' and 'asoc/fix/fsl-spdif' into asoc-linus
......@@ -1018,13 +1018,13 @@ static int alc5623_i2c_probe(struct i2c_client *client,
dev_err(&client->dev, "failed to read vendor ID1: %d\n", ret);
return ret;
}
vid1 = ((vid1 & 0xff) << 8) | (vid1 >> 8);
ret = regmap_read(alc5623->regmap, ALC5623_VENDOR_ID2, &vid2);
if (ret < 0) {
dev_err(&client->dev, "failed to read vendor ID2: %d\n", ret);
return ret;
}
vid2 >>= 8;
if ((vid1 != 0x10ec) || (vid2 != id->driver_data)) {
dev_err(&client->dev, "unknown or wrong codec\n");
......
......@@ -1229,8 +1229,10 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client,
}
if (cs42l52->pdata.reset_gpio) {
ret = gpio_request_one(cs42l52->pdata.reset_gpio,
GPIOF_OUT_INIT_HIGH, "CS42L52 /RST");
ret = devm_gpio_request_one(&i2c_client->dev,
cs42l52->pdata.reset_gpio,
GPIOF_OUT_INIT_HIGH,
"CS42L52 /RST");
if (ret < 0) {
dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
cs42l52->pdata.reset_gpio, ret);
......
......@@ -1443,8 +1443,10 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client,
i2c_set_clientdata(i2c_client, cs42l73);
if (cs42l73->pdata.reset_gpio) {
ret = gpio_request_one(cs42l73->pdata.reset_gpio,
GPIOF_OUT_INIT_HIGH, "CS42L73 /RST");
ret = devm_gpio_request_one(&i2c_client->dev,
cs42l73->pdata.reset_gpio,
GPIOF_OUT_INIT_HIGH,
"CS42L73 /RST");
if (ret < 0) {
dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n",
cs42l73->pdata.reset_gpio, ret);
......
......@@ -144,8 +144,8 @@ enum spdif_gainsel {
/* SPDIF Clock register */
#define STC_SYSCLK_DIV_OFFSET 11
#define STC_SYSCLK_DIV_MASK (0x1ff << STC_TXCLK_SRC_OFFSET)
#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
#define STC_SYSCLK_DIV_MASK (0x1ff << STC_SYSCLK_DIV_OFFSET)
#define STC_SYSCLK_DIV(x) ((((x) - 1) << STC_SYSCLK_DIV_OFFSET) & STC_SYSCLK_DIV_MASK)
#define STC_TXCLK_SRC_OFFSET 8
#define STC_TXCLK_SRC_MASK (0x7 << STC_TXCLK_SRC_OFFSET)
#define STC_TXCLK_SRC_SET(x) ((x << STC_TXCLK_SRC_OFFSET) & STC_TXCLK_SRC_MASK)
......
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