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Commit 237d20c2 authored by Po Liu's avatar Po Liu Committed by David S. Miller
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net:enetc: enetc qos using the CBDR dma alloc function 

Now we can use the enetc_cbd_alloc_data_mem() to replace complicated DMA
data alloc method and CBDR memory basic seting.
Signed-off-by: default avatarPo Liu <po.liu@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0cc11cdb
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Showing with 22 additions and 75 deletions
drivers/net/ethernet/freescale/enetc/enetc_qos.c
View file @ 237d20c2
......@@ -45,7 +45,6 @@ void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed)
| pspeed);
}
#define ENETC_QOS_ALIGN 64
static int enetc_setup_taprio(struct net_device *ndev,
struct tc_taprio_qopt_offload *admin_conf)
{
......@@ -53,7 +52,7 @@ static int enetc_setup_taprio(struct net_device *ndev,
struct enetc_cbd cbd = {.cmd = 0};
struct tgs_gcl_conf *gcl_config;
struct tgs_gcl_data *gcl_data;
dma_addr_t dma, dma_align;
dma_addr_t dma;
struct gce *gce;
u16 data_size;
u16 gcl_len;
......@@ -84,16 +83,10 @@ static int enetc_setup_taprio(struct net_device *ndev,
gcl_config = &cbd.gcl_conf;
data_size = struct_size(gcl_data, entry, gcl_len);
tmp = dma_alloc_coherent(&priv->si->pdev->dev,
data_size + ENETC_QOS_ALIGN,
&dma, GFP_KERNEL);
if (!tmp) {
dev_err(&priv->si->pdev->dev,
"DMA mapping of taprio gate list failed!\n");
tmp = enetc_cbd_alloc_data_mem(priv->si, &cbd, data_size,
&dma, (void *)&gcl_data);
if (!tmp)
return -ENOMEM;
}
dma_align = ALIGN(dma, ENETC_QOS_ALIGN);
gcl_data = (struct tgs_gcl_data *)PTR_ALIGN(tmp, ENETC_QOS_ALIGN);
gce = (struct gce *)(gcl_data + 1);
......@@ -116,11 +109,8 @@ static int enetc_setup_taprio(struct net_device *ndev,
temp_gce->period = cpu_to_le32(temp_entry->interval);
}
cbd.length = cpu_to_le16(data_size);
cbd.status_flags = 0;
cbd.addr[0] = cpu_to_le32(lower_32_bits(dma_align));
cbd.addr[1] = cpu_to_le32(upper_32_bits(dma_align));
cbd.cls = BDCR_CMD_PORT_GCL;
cbd.status_flags = 0;
......@@ -133,8 +123,7 @@ static int enetc_setup_taprio(struct net_device *ndev,
ENETC_QBV_PTGCR_OFFSET,
tge & (~ENETC_QBV_TGE));
dma_free_coherent(&priv->si->pdev->dev, data_size + ENETC_QOS_ALIGN,
tmp, dma);
enetc_cbd_free_data_mem(priv->si, data_size, tmp, &dma);
return err;
}
......@@ -451,6 +440,7 @@ static struct actions_fwd enetc_act_fwd[] = {
};
static struct enetc_psfp epsfp = {
.dev_bitmap = 0,
.psfp_sfi_bitmap = NULL,
};
......@@ -464,7 +454,7 @@ static int enetc_streamid_hw_set(struct enetc_ndev_priv *priv,
struct enetc_cbd cbd = {.cmd = 0};
struct streamid_data *si_data;
struct streamid_conf *si_conf;
dma_addr_t dma, dma_align;
dma_addr_t dma;
u16 data_size;
void *tmp;
int port;
......@@ -487,20 +477,11 @@ static int enetc_streamid_hw_set(struct enetc_ndev_priv *priv,
cbd.status_flags = 0;
data_size = sizeof(struct streamid_data);
tmp = dma_alloc_coherent(&priv->si->pdev->dev,
data_size + ENETC_QOS_ALIGN,
&dma, GFP_KERNEL);
if (!tmp) {
dev_err(&priv->si->pdev->dev,
"DMA mapping of stream identify failed!\n");
tmp = enetc_cbd_alloc_data_mem(priv->si, &cbd, data_size,
&dma, (void *)&si_data);
if (!tmp)
return -ENOMEM;
}
dma_align = ALIGN(dma, ENETC_QOS_ALIGN);
si_data = (struct streamid_data *)PTR_ALIGN(tmp, ENETC_QOS_ALIGN);
cbd.length = cpu_to_le16(data_size);
cbd.addr[0] = cpu_to_le32(lower_32_bits(dma_align));
cbd.addr[1] = cpu_to_le32(upper_32_bits(dma_align));
eth_broadcast_addr(si_data->dmac);
si_data->vid_vidm_tg = (ENETC_CBDR_SID_VID_MASK
+ ((0x3 << 14) | ENETC_CBDR_SID_VIDM));
......@@ -521,11 +502,6 @@ static int enetc_streamid_hw_set(struct enetc_ndev_priv *priv,
goto out;
/* Enable the entry overwrite again incase space flushed by hardware */
memset(&cbd, 0, sizeof(cbd));
cbd.index = cpu_to_le16((u16)sid->index);
cbd.cmd = 0;
cbd.cls = BDCR_CMD_STREAM_IDENTIFY;
cbd.status_flags = 0;
si_conf->en = 0x80;
......@@ -538,11 +514,6 @@ static int enetc_streamid_hw_set(struct enetc_ndev_priv *priv,
memset(si_data, 0, data_size);
cbd.length = cpu_to_le16(data_size);
cbd.addr[0] = cpu_to_le32(lower_32_bits(dma_align));
cbd.addr[1] = cpu_to_le32(upper_32_bits(dma_align));
/* VIDM default to be 1.
* VID Match. If set (b1) then the VID must match, otherwise
* any VID is considered a match. VIDM setting is only used
......@@ -562,8 +533,7 @@ static int enetc_streamid_hw_set(struct enetc_ndev_priv *priv,
err = enetc_send_cmd(priv->si, &cbd);
out:
dma_free_coherent(&priv->si->pdev->dev, data_size + ENETC_QOS_ALIGN,
tmp, dma);
enetc_cbd_free_data_mem(priv->si, data_size, tmp, &dma);
return err;
}
......@@ -632,7 +602,7 @@ static int enetc_streamcounter_hw_get(struct enetc_ndev_priv *priv,
{
struct enetc_cbd cbd = { .cmd = 2 };
struct sfi_counter_data *data_buf;
dma_addr_t dma, dma_align;
dma_addr_t dma;
u16 data_size;
void *tmp;
int err;
......@@ -643,21 +613,11 @@ static int enetc_streamcounter_hw_get(struct enetc_ndev_priv *priv,
cbd.status_flags = 0;
data_size = sizeof(struct sfi_counter_data);
tmp = dma_alloc_coherent(&priv->si->pdev->dev,
data_size + ENETC_QOS_ALIGN,
&dma, GFP_KERNEL);
if (!tmp) {
dev_err(&priv->si->pdev->dev,
"DMA mapping of stream counter failed!\n");
return -ENOMEM;
}
dma_align = ALIGN(dma, ENETC_QOS_ALIGN);
data_buf = (struct sfi_counter_data *)PTR_ALIGN(tmp, ENETC_QOS_ALIGN);
cbd.addr[0] = cpu_to_le32(lower_32_bits(dma_align));
cbd.addr[1] = cpu_to_le32(upper_32_bits(dma_align));
cbd.length = cpu_to_le16(data_size);
tmp = enetc_cbd_alloc_data_mem(priv->si, &cbd, data_size,
&dma, (void *)&data_buf);
if (!tmp)
return -ENOMEM;
err = enetc_send_cmd(priv->si, &cbd);
if (err)
......@@ -684,8 +644,7 @@ static int enetc_streamcounter_hw_get(struct enetc_ndev_priv *priv,
data_buf->flow_meter_dropl;
exit:
dma_free_coherent(&priv->si->pdev->dev, data_size + ENETC_QOS_ALIGN,
tmp, dma);
enetc_cbd_free_data_mem(priv->si, data_size, tmp, &dma);
return err;
}
......@@ -725,7 +684,7 @@ static int enetc_streamgate_hw_set(struct enetc_ndev_priv *priv,
struct sgcl_conf *sgcl_config;
struct sgcl_data *sgcl_data;
struct sgce *sgce;
dma_addr_t dma, dma_align;
dma_addr_t dma;
u16 data_size;
int err, i;
void *tmp;
......@@ -775,20 +734,10 @@ static int enetc_streamgate_hw_set(struct enetc_ndev_priv *priv,
sgcl_config->acl_len = (sgi->num_entries - 1) & 0x3;
data_size = struct_size(sgcl_data, sgcl, sgi->num_entries);
tmp = dma_alloc_coherent(&priv->si->pdev->dev,
data_size + ENETC_QOS_ALIGN,
&dma, GFP_KERNEL);
if (!tmp) {
dev_err(&priv->si->pdev->dev,
"DMA mapping of stream counter failed!\n");
tmp = enetc_cbd_alloc_data_mem(priv->si, &cbd, data_size,
&dma, (void *)&sgcl_data);
if (!tmp)
return -ENOMEM;
}
dma_align = ALIGN(dma, ENETC_QOS_ALIGN);
sgcl_data = (struct sgcl_data *)PTR_ALIGN(tmp, ENETC_QOS_ALIGN);
cbd.length = cpu_to_le16(data_size);
cbd.addr[0] = cpu_to_le32(lower_32_bits(dma_align));
cbd.addr[1] = cpu_to_le32(upper_32_bits(dma_align));
sgce = &sgcl_data->sgcl[0];
......@@ -843,9 +792,7 @@ static int enetc_streamgate_hw_set(struct enetc_ndev_priv *priv,
err = enetc_send_cmd(priv->si, &cbd);
exit:
dma_free_coherent(&priv->si->pdev->dev, data_size + ENETC_QOS_ALIGN,
tmp, dma);
enetc_cbd_free_data_mem(priv->si, data_size, tmp, &dma);
return err;
}
......
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