Commit 2384b36f authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman

powerpc: Select ARCH_HAS_MEMBARRIER_SYNC_CORE

powerpc return from interrupt and return from system call sequences
are context synchronising.
Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200716013522.338318-1-npiggin@gmail.com
parent 147c1341
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
# #
# Architecture requirements # Architecture requirements
# #
# * arm/arm64 # * arm/arm64/powerpc
# #
# Rely on implicit context synchronization as a result of exception return # Rely on implicit context synchronization as a result of exception return
# when returning from IPI handler, and when returning to user-space. # when returning from IPI handler, and when returning to user-space.
...@@ -45,7 +45,7 @@ ...@@ -45,7 +45,7 @@
| nios2: | TODO | | nios2: | TODO |
| openrisc: | TODO | | openrisc: | TODO |
| parisc: | TODO | | parisc: | TODO |
| powerpc: | TODO | | powerpc: | ok |
| riscv: | TODO | | riscv: | TODO |
| s390: | TODO | | s390: | TODO |
| sh: | TODO | | sh: | TODO |
......
...@@ -131,6 +131,7 @@ config PPC ...@@ -131,6 +131,7 @@ config PPC
select ARCH_HAS_PTE_DEVMAP if PPC_BOOK3S_64 select ARCH_HAS_PTE_DEVMAP if PPC_BOOK3S_64
select ARCH_HAS_PTE_SPECIAL select ARCH_HAS_PTE_SPECIAL
select ARCH_HAS_MEMBARRIER_CALLBACKS select ARCH_HAS_MEMBARRIER_CALLBACKS
select ARCH_HAS_MEMBARRIER_SYNC_CORE
select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE && PPC_BOOK3S_64 select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE && PPC_BOOK3S_64
select ARCH_HAS_STRICT_KERNEL_RWX if (PPC32 && !HIBERNATION) select ARCH_HAS_STRICT_KERNEL_RWX if (PPC32 && !HIBERNATION)
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
......
...@@ -204,7 +204,11 @@ exc_##label##_book3e: ...@@ -204,7 +204,11 @@ exc_##label##_book3e:
LOAD_REG_ADDR(r3,interrupt_base_book3e);\ LOAD_REG_ADDR(r3,interrupt_base_book3e);\
ori r3,r3,vector_offset@l; \ ori r3,r3,vector_offset@l; \
mtspr SPRN_IVOR##vector_number,r3; mtspr SPRN_IVOR##vector_number,r3;
/*
* powerpc relies on return from interrupt/syscall being context synchronising
* (which rfi is) to support ARCH_HAS_MEMBARRIER_SYNC_CORE without additional
* synchronisation instructions.
*/
#define RFI_TO_KERNEL \ #define RFI_TO_KERNEL \
rfi rfi
......
...@@ -68,6 +68,14 @@ ...@@ -68,6 +68,14 @@
* *
* The nop instructions allow us to insert one or more instructions to flush the * The nop instructions allow us to insert one or more instructions to flush the
* L1-D cache when returning to userspace or a guest. * L1-D cache when returning to userspace or a guest.
*
* powerpc relies on return from interrupt/syscall being context synchronising
* (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE
* without additional synchronisation instructions.
*
* soft-masked interrupt replay does not include a context-synchronising rfid,
* but those always return to kernel, the sync is only required when returning
* to user.
*/ */
#define RFI_FLUSH_SLOT \ #define RFI_FLUSH_SLOT \
RFI_FLUSH_FIXUP_SECTION; \ RFI_FLUSH_FIXUP_SECTION; \
......
...@@ -35,6 +35,12 @@ ...@@ -35,6 +35,12 @@
#include "head_32.h" #include "head_32.h"
/*
* powerpc relies on return from interrupt/syscall being context synchronising
* (which rfi is) to support ARCH_HAS_MEMBARRIER_SYNC_CORE without additional
* synchronisation instructions.
*/
/* /*
* Align to 4k in order to ensure that all functions modyfing srr0/srr1 * Align to 4k in order to ensure that all functions modyfing srr0/srr1
* fit into one page in order to not encounter a TLB miss between the * fit into one page in order to not encounter a TLB miss between the
......
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