Commit 24592482 authored by Heiner Kallweit's avatar Heiner Kallweit Committed by Wolfram Sang

i2c: i801: Centralize configuring non-block commands in i801_simple_transaction

Currently configuring command register settings is distributed over multiple
functions. At first centralize this for non-block commands in
i801_simple_transaction().
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: default avatarJean Delvare <jdelvare@suse.de>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
parent 63fd342f
...@@ -738,35 +738,47 @@ static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write) ...@@ -738,35 +738,47 @@ static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write)
/* Single value transaction function */ /* Single value transaction function */
static int i801_simple_transaction(struct i801_priv *priv, union i2c_smbus_data *data, static int i801_simple_transaction(struct i801_priv *priv, union i2c_smbus_data *data,
char read_write, int command) u8 addr, u8 hstcmd, char read_write, int command)
{ {
int xact, ret; int xact, ret;
switch (command) { switch (command) {
case I2C_SMBUS_QUICK: case I2C_SMBUS_QUICK:
i801_set_hstadd(priv, addr, read_write);
xact = I801_QUICK; xact = I801_QUICK;
break; break;
case I2C_SMBUS_BYTE: case I2C_SMBUS_BYTE:
i801_set_hstadd(priv, addr, read_write);
if (read_write == I2C_SMBUS_WRITE)
outb_p(hstcmd, SMBHSTCMD(priv));
xact = I801_BYTE; xact = I801_BYTE;
break; break;
case I2C_SMBUS_BYTE_DATA: case I2C_SMBUS_BYTE_DATA:
i801_set_hstadd(priv, addr, read_write);
if (read_write == I2C_SMBUS_WRITE) if (read_write == I2C_SMBUS_WRITE)
outb_p(data->byte, SMBHSTDAT0(priv)); outb_p(data->byte, SMBHSTDAT0(priv));
outb_p(hstcmd, SMBHSTCMD(priv));
xact = I801_BYTE_DATA; xact = I801_BYTE_DATA;
break; break;
case I2C_SMBUS_WORD_DATA: case I2C_SMBUS_WORD_DATA:
i801_set_hstadd(priv, addr, read_write);
if (read_write == I2C_SMBUS_WRITE) { if (read_write == I2C_SMBUS_WRITE) {
outb_p(data->word & 0xff, SMBHSTDAT0(priv)); outb_p(data->word & 0xff, SMBHSTDAT0(priv));
outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
} }
outb_p(hstcmd, SMBHSTCMD(priv));
xact = I801_WORD_DATA; xact = I801_WORD_DATA;
break; break;
case I2C_SMBUS_PROC_CALL: case I2C_SMBUS_PROC_CALL:
i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
outb_p(data->word & 0xff, SMBHSTDAT0(priv)); outb_p(data->word & 0xff, SMBHSTDAT0(priv));
outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv)); outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
outb_p(hstcmd, SMBHSTCMD(priv));
read_write = I2C_SMBUS_READ;
xact = I801_PROC_CALL; xact = I801_PROC_CALL;
break; break;
default: default:
pci_err(priv->pci_dev, "Unsupported transaction %d\n", command);
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
...@@ -857,25 +869,10 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, ...@@ -857,25 +869,10 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
switch (size) { switch (size) {
case I2C_SMBUS_QUICK: case I2C_SMBUS_QUICK:
i801_set_hstadd(priv, addr, read_write);
break;
case I2C_SMBUS_BYTE: case I2C_SMBUS_BYTE:
i801_set_hstadd(priv, addr, read_write);
if (read_write == I2C_SMBUS_WRITE)
outb_p(command, SMBHSTCMD(priv));
break;
case I2C_SMBUS_BYTE_DATA: case I2C_SMBUS_BYTE_DATA:
i801_set_hstadd(priv, addr, read_write);
outb_p(command, SMBHSTCMD(priv));
break;
case I2C_SMBUS_WORD_DATA: case I2C_SMBUS_WORD_DATA:
i801_set_hstadd(priv, addr, read_write);
outb_p(command, SMBHSTCMD(priv));
break;
case I2C_SMBUS_PROC_CALL: case I2C_SMBUS_PROC_CALL:
i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
outb_p(command, SMBHSTCMD(priv));
read_write = I2C_SMBUS_READ;
break; break;
case I2C_SMBUS_BLOCK_DATA: case I2C_SMBUS_BLOCK_DATA:
i801_set_hstadd(priv, addr, read_write); i801_set_hstadd(priv, addr, read_write);
...@@ -922,7 +919,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, ...@@ -922,7 +919,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
if (block) if (block)
ret = i801_block_transaction(priv, data, read_write, size); ret = i801_block_transaction(priv, data, read_write, size);
else else
ret = i801_simple_transaction(priv, data, read_write, size); ret = i801_simple_transaction(priv, data, addr, command, read_write, size);
/* Some BIOSes don't like it when PEC is enabled at reboot or resume /* Some BIOSes don't like it when PEC is enabled at reboot or resume
* time, so we forcibly disable it after every transaction. * time, so we forcibly disable it after every transaction.
......
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