Commit 246e30cc authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by David S. Miller

sh_eth: add sh_eth_cpu_data::xdfar_rw flag

The GEther-like controllers have writeable RDFAR/TDFAR, on the others
they are read-only or just absent (on R-Car). Currently we are calling
sh_eth_is_{gether|rz_fast_ether}() in order to check if these registers
can be written to, however it would be simpler to check the new 'xdfar_rw'
bitfield in the 'struct sh_eth_cpu_data'...
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 3e416992
...@@ -611,6 +611,7 @@ static struct sh_eth_cpu_data r7s72100_data = { ...@@ -611,6 +611,7 @@ static struct sh_eth_cpu_data r7s72100_data = {
.rpadir_value = 2 << 16, .rpadir_value = 2 << 16,
.no_trimd = 1, .no_trimd = 1,
.no_ade = 1, .no_ade = 1,
.xdfar_rw = 1,
.hw_checksum = 1, .hw_checksum = 1,
.tsu = 1, .tsu = 1,
}; };
...@@ -659,6 +660,7 @@ static struct sh_eth_cpu_data r8a7740_data = { ...@@ -659,6 +660,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
.rpadir_value = 2 << 16, .rpadir_value = 2 << 16,
.no_trimd = 1, .no_trimd = 1,
.no_ade = 1, .no_ade = 1,
.xdfar_rw = 1,
.hw_checksum = 1, .hw_checksum = 1,
.tsu = 1, .tsu = 1,
.select_mii = 1, .select_mii = 1,
...@@ -918,6 +920,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = { ...@@ -918,6 +920,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
.rpadir_value = 2 << 16, .rpadir_value = 2 << 16,
.no_trimd = 1, .no_trimd = 1,
.no_ade = 1, .no_ade = 1,
.xdfar_rw = 1,
.tsu = 1, .tsu = 1,
.dual_port = 1, .dual_port = 1,
}; };
...@@ -955,6 +958,7 @@ static struct sh_eth_cpu_data sh7734_data = { ...@@ -955,6 +958,7 @@ static struct sh_eth_cpu_data sh7734_data = {
.hw_swap = 1, .hw_swap = 1,
.no_trimd = 1, .no_trimd = 1,
.no_ade = 1, .no_ade = 1,
.xdfar_rw = 1,
.tsu = 1, .tsu = 1,
.hw_checksum = 1, .hw_checksum = 1,
.select_mii = 1, .select_mii = 1,
...@@ -993,6 +997,7 @@ static struct sh_eth_cpu_data sh7763_data = { ...@@ -993,6 +997,7 @@ static struct sh_eth_cpu_data sh7763_data = {
.hw_swap = 1, .hw_swap = 1,
.no_trimd = 1, .no_trimd = 1,
.no_ade = 1, .no_ade = 1,
.xdfar_rw = 1,
.tsu = 1, .tsu = 1,
.irq_flags = IRQF_SHARED, .irq_flags = IRQF_SHARED,
.magic = 1, .magic = 1,
...@@ -1301,8 +1306,7 @@ static void sh_eth_ring_format(struct net_device *ndev) ...@@ -1301,8 +1306,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
/* Rx descriptor address set */ /* Rx descriptor address set */
if (i == 0) { if (i == 0) {
sh_eth_write(ndev, mdp->rx_desc_dma, RDLAR); sh_eth_write(ndev, mdp->rx_desc_dma, RDLAR);
if (sh_eth_is_gether(mdp) || if (mdp->cd->xdfar_rw)
sh_eth_is_rz_fast_ether(mdp))
sh_eth_write(ndev, mdp->rx_desc_dma, RDFAR); sh_eth_write(ndev, mdp->rx_desc_dma, RDFAR);
} }
} }
...@@ -1324,8 +1328,7 @@ static void sh_eth_ring_format(struct net_device *ndev) ...@@ -1324,8 +1328,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
if (i == 0) { if (i == 0) {
/* Tx descriptor address set */ /* Tx descriptor address set */
sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR); sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR);
if (sh_eth_is_gether(mdp) || if (mdp->cd->xdfar_rw)
sh_eth_is_rz_fast_ether(mdp))
sh_eth_write(ndev, mdp->tx_desc_dma, TDFAR); sh_eth_write(ndev, mdp->tx_desc_dma, TDFAR);
} }
} }
......
...@@ -508,6 +508,7 @@ struct sh_eth_cpu_data { ...@@ -508,6 +508,7 @@ struct sh_eth_cpu_data {
unsigned rpadir:1; /* E-DMAC have RPADIR */ unsigned rpadir:1; /* E-DMAC have RPADIR */
unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */ unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */ unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
unsigned xdfar_rw:1; /* E-DMAC has writeable RDFAR/TDFAR */
unsigned hw_checksum:1; /* E-DMAC has CSMR */ unsigned hw_checksum:1; /* E-DMAC has CSMR */
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */ unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */
unsigned rmiimode:1; /* EtherC has RMIIMODE register */ unsigned rmiimode:1; /* EtherC has RMIIMODE register */
......
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